MIPS: cmpxchg: Omit redundant barriers for Loongson3

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When building a kernel configured to support Loongson3 LL/SC workarounds
(ie. CONFIG_CPU_LOONGSON3_WORKAROUNDS=y) the inline assembly in
__xchg_asm() & __cmpxchg_asm() already emits completion barriers, and as
such we don't need to emit extra barriers from the xchg() or cmpxchg()
macros. Add compile-time constant checks causing us to omit the
redundant memory barriers.

Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
Cc: Huacai Chen <chenhc@lemote.com>
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: linux-kernel@vger.kernel.org

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Paul Burton 2019-10-01 21:53:38 +00:00

parent 6a57d2d1e7

commit a91f2a1dba

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1 changed files with 23 additions and 3 deletions

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arch/mips/include/asm/cmpxchg.h

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