net: eth: altera: Change access ports to mdio for all xMII applications

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Change use of Altera TSE's MDIO access from phy 0 registers to phy 1
registers. This allows support for GMII, MII, RGMII, and SGMII
designs where the external PHY is always accesible through
Altera TSE's MDIO phy 1 registers and Altera's PCS is accessible
through MDIO phy 0 registers for SGMII applications.

Signed-off-by: Vince Bridgers <vbridger@opensource.altera.com>
Tested-by: Kai Lin Ng <kailng@altera.com>
Tested-by: Dalon Westergreen <dwesterg@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

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Vince Bridgers 2015-02-12 10:47:33 -06:00 • committed by David S. Miller

parent a53c4bf7f2

commit a923fc730f

1 changed files with 4 additions and 4 deletions

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drivers/net/ethernet/altera/altera_tse_main.c

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