dt-bindings: serial: snps-dw-apb-uart: Add Anlogic DR1V90 uart

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The Anlogic DR1V90 SoC integrates a UART controller compatible with
snps,dw-apb-uart, operating at a 50 MHz clock.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

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Junhui Liu 2025-10-21 17:41:43 +08:00 • committed by Conor Dooley

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commit a94f9be294

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Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml

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