[media] mt9p031: Add support for PLL bypass

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When the input clock frequency is out of bounds for the PLL, bypass the
PLL and just divide the input clock to achieve the requested output
frequency.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>

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Laurent Pinchart 2014-02-09 17:31:47 -03:00 • committed by Mauro Carvalho Chehab

parent e8e45593c9

commit a970449e40

1 changed files with 32 additions and 0 deletions

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drivers/media/i2c/mt9p031.c

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