cxl: Configure the PSL for two CAPI ports on POWER8NVL

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The POWER8NVL chip has two CAPI ports.  Configure the PSL to route
data to the port corresponding to the CAPP unit.

Signed-off-by: Philippe Bergheaud <felix@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

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Philippe Bergheaud 2016-03-31 11:19:28 +02:00 • committed by Michael Ellerman

parent 86c9ffcc1e

commit aa14138a51

1 changed files with 40 additions and 1 deletions

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41

drivers/misc/cxl/pci.c

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