drm/amdgpu: refine uvd_4.2 clock gate sequence.

Browse source

1. partial revert commit 91db308d6e96.
   not set uvd bypass mode.
2. enable uvd cg before initialize uvd.
3. set uvd clock to default value 100MHz.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

This commit is contained in:

Rex Zhu 2016-11-04 20:35:46 +08:00 • committed by Alex Deucher

parent dc2f8a9aa9

commit aa4747c00a

2 changed files with 9 additions and 39 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

8

drivers/gpu/drm/amd/amdgpu/ci_dpm.c

View file

40

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

View file