drm/i915: PIPE M/N registers need an offset on VLV

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Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

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Ville Syrjälä 2013-01-24 15:29:32 +02:00 • committed by Daniel Vetter

parent b906487c51

commit aab17139a0

1 changed files with 16 additions and 16 deletions

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drivers/gpu/drm/i915/i915_reg.h

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