drm/i915/chv: Skip gen6_gt_check_fifodbg() on CHV

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CHV uses the gen8 shadow register mechanism so we shouldn't be
checking the GT FIFO status.

This effectively removes the posting read, so add an explicit
posting read using FORCEWAKE_ACK_VLV (which is what use in
vlv_forcewake_reset()).

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

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Ville Syrjälä 2014-05-23 21:00:19 +05:30 • committed by Daniel Vetter

parent 3f4e349587

commit ab53c267f2

1 changed files with 4 additions and 3 deletions

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drivers/gpu/drm/i915/intel_uncore.c

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