drm/amd/display: Clear DPCD lane settings after repeater training

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[Why]
VS and PE requested by repeater should not persist for the sink.

[How]
Clear DPCD lane settings after repeater link training finishes.

Reviewed-by: Wesley Chalmers <wesley.chalmers@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: George Shen <George.Shen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Shen, George 2021-11-15 22:38:18 -05:00 • committed by Alex Deucher

parent 9311ed1e12

commit aba3c3fede

1 changed files with 1 additions and 1 deletions

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drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c

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