clk: renesas: r8a779g0: Correct PFC/GPIO parent clocks

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According to the R-Car V4H Series Hardware User’s Manual Rev.1.00, the
parent clock of the Pin Function (PFC/GPIO) module clocks is the CP
clock.

Fix this by adding the missing CP clock, and correcting the PFC parents.

Fixes: f2afa78d5a ("dt-bindings: clock: Add r8a779g0 CPG Core Clock Definitions")
Fixes: 36ff366033 ("clk: renesas: r8a779g0: Add PFC/GPIO clocks")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/5401fccd204dc90b44f0013e7f53b9eff8df8214.1706197297.git.geert+renesas@glider.be

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This commit is contained in:

Geert Uytterhoeven 2024-01-25 16:43:26 +01:00

parent 5aaa139b9a

commit abb3fa662b

2 changed files with 7 additions and 5 deletions

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11

drivers/clk/renesas/r8a779g0-cpg-mssr.c

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1

include/dt-bindings/clock/r8a779g0-cpg-mssr.h

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