drm/amdgpu: fix the fw size for sdma

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For SDMA, if use the total size of SDMA TH0 and TH1 to allocate fw BO
may result to the ucode data overflow when copy ucode to BO as the PAGE
alignment.
IMU have the same issue.
Fix the above issue by alignment the fw size per fw ID.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Likun Gao 2022-04-12 16:57:45 -04:00 • committed by Alex Deucher

parent a76be7bbc3

commit aca670e41f

1 changed files with 2 additions and 2 deletions

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drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c

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