r8169: improve RTL8168g PHY suspend quirk

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According to Realtek the ERI register 0x1a8 quirk is needed to work
around a hw issue with the PHY on RTL8168g. The register needs to be
changed before powering down the PHY. Currently we don't meet this
requirement, however I'm not aware of any problems caused by this.
Therefore I see the change as an improvement.

The PHY driver has no means to access the chip ERI registers,
therefore we have to intercept MDIO writes to BMCR register.
If the BMCR_PDOWN bit is going to be set, then let's apply the
quirk before actually powering down the PHY.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

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Heiner Kallweit 2021-01-06 11:49:50 +01:00 • committed by Jakub Kicinski

parent c6cff9dfeb

commit acb58657c8

1 changed files with 26 additions and 26 deletions

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drivers/net/ethernet/realtek/r8169_main.c

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