clk: imx7d: Fix the powerdown bit location of PLL DDR

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According to the MX7D Reference Manual the powerdown bit of
CCM_ANALOG_PLL_DDRn register is bit 20, so fix it accordingly.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

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Fabio Estevam 2017-05-15 08:55:05 -03:00 • committed by Stephen Boyd

parent 9593f4f56c

commit ad14972422

3 changed files with 7 additions and 1 deletions

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2

drivers/clk/imx/clk-imx7d.c

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5

drivers/clk/imx/clk-pllv3.c

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1

drivers/clk/imx/clk.h

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