ixgbe: Remove tail write abstraction and add missing barrier

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This change cleans up the tail writes for the ixgbe descriptor queues.  The
current implementation had me confused as I wasn't sure if it was still
making use of the surprise remove logic or not.

It also adds the mmiowb which is needed on ia64, mips, and a couple other
architectures in order to synchronize the MMIO writes with the Tx queue
_xmit_lock spinlock.

Cc: Don Skidmore <donald.c.skidmore@intel.com>
Signed-off-by: Alexander Duyck <alexander.h.duyck@redhat.com>
Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>

...

This commit is contained in:

Alexander Duyck 2014-11-14 00:56:35 +00:00 • committed by Jeff Kirsher

parent 18cb652a41

commit ad435ec689

2 changed files with 20 additions and 25 deletions

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5

drivers/net/ethernet/intel/ixgbe/ixgbe.h

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40

drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

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