drm/i915/xehpsdv: Read correct RP_STATE_CAP register

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The RP_STATE_CAP register is no longer part of the MCHBAR on XEHPSDV; this
register is now a per-tile register at GTTMMADDR offset 0x250014.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210805163647.801064-7-matthew.d.roper@intel.com

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Matt Roper 2021-08-05 09:36:44 -07:00

parent efd330b978

commit ad482232e3

2 changed files with 4 additions and 1 deletions

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4

drivers/gpu/drm/i915/gt/intel_rps.c

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1

drivers/gpu/drm/i915/i915_reg.h

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