perf_counter, x86: Implement generalized cache event types, add Atom support

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Fill in core2_hw_cache_event_id[] with the Atom model specific events.

The events can be used in all the tools via the -e (--event) parameter,
for example "-e l1-misses" or -"-e l2-accesses" or "-e l2-write-misses".

( Note: these are straight from the Intel manuals - not tested yet.)

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Mike Galbraith <efault@gmx.de>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

...

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Thomas Gleixner 2009-06-08 09:30:41 +02:00 • committed by Ingo Molnar

parent 0312af8416

commit ad68922061

1 changed files with 84 additions and 1 deletions

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arch/x86/kernel/cpu/perf_counter.c

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