drm/amd/display: Bound DSC power gating loop by num_dsc

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pg_cntl42_dsc_pg_status(i) should be bounded by the number of dsc,
which is different from the number of DPP on dcn42b.

Reviewed-by: Matthew Stewart <matthew.stewart2@amd.com>
Signed-off-by: Gabe Teeger <gabe.teeger@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Gabe Teeger 2026-09-02 13:41:54 -04:00 • committed by Alex Deucher

parent b788a0cfb2

commit ad726d8639

1 changed files with 4 additions and 0 deletions

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drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

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