drm/amd/display: removed unnecessary check when dpp clock increasing

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[Why]
When switching single pipe to split pipe, the bandwidth check is just
for first pipe.  The 2nd pipe with abnormal(or zero) dpp clock when pipe
ready and unlock leads the garbage on display.

[How]
Removed external increasing dpp clock check, the internal function
already loops all of pipes to check whether update dpp clock.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Chiawen Huang <chiawen.huang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

This commit is contained in:

Chiawen Huang 2020-12-14 13:41:43 +08:00 • committed by Alex Deucher

parent f8e792dc5c

commit ae2175641a

1 changed files with 1 additions and 2 deletions

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drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c

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