perf/x86/intel: Fix SLM MSR_OFFCORE_RSP1 valid_mask

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AVG_LATENCY(bit 38) is only available on MSR_OFFCORE_RSP0.
So the bit should be removed from RSP1 valid_mask.

Since RSP0 and RSP1 may have different valid_mask, intel_alt_er should
validate the config on the alternate offcore reg before replacing it.

Signed-off-by: Kan Liang <kan.liang@intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1435170215-5017-1-git-send-email-kan.liang@intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>

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Kan Liang 2015-06-24 11:23:35 -07:00 • committed by Ingo Molnar

parent c749b3e963

commit ae3f011fc2

1 changed files with 10 additions and 6 deletions

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arch/x86/kernel/cpu/perf_event_intel.c

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