clk: versaclock3: Prepare for the addition of 5L35023 device

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The 5P35023 and 5L35035 Versa 3 clock generator variants are different but
the versaclock3 driver could be used with small adjustments. The features
that are implemented in driver and differs b/w variants are the PLL2 Fvco
and clock sel bit for SE2 clock. Adjust the driver to prepare for the
addition of 5L35023 device.

Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Link: https://lore.kernel.org/r/20241210170953.2936724-2-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

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Claudiu Beznea 2024-12-10 19:09:30 +02:00 • committed by Stephen Boyd

parent 40384c840e

commit ae6040cd7c

1 changed files with 43 additions and 18 deletions

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drivers/clk/clk-versaclock3.c

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