ARM: ux500 specific L2 cache code

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The generic version of l2x0_inv_all is only called just after disabling
the L2 cache and is surrounded by a spinlock. However, we're not really
turning off the L2 cache right now, and the PL310 does not support
exclusive accesses (used to implement the spinlock). So, the
invalidation needs to be done without the spinlock.

Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Hans-Juergen Koch <hjk@linutronix.de>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Per Fransson <per.xx.fransson@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>

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Per Fransson 2010-09-08 21:21:40 +05:30 • committed by Santosh Shilimkar

parent 444457c1f5

commit ae6948048c

1 changed files with 45 additions and 0 deletions

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arch/arm/mach-ux500/cpu.c

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