drm/sun4i: DW HDMI PHY: Add support for second PLL

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Some DW HDMI PHYs, like those found in A64 and R40 SoCs, can select
between two clock parents.

Add code which reads second PLL from DT.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180625120304.7543-19-jernej.skrabec@siol.net

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Jernej Skrabec 2018-06-25 14:02:58 +02:00 • committed by Maxime Ripard

parent 09f380e3ba

commit aef13fd842

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GPG key ID: D2B4C094214DAF74

2 changed files with 17 additions and 5 deletions

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2

drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h

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20

drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c

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