drm/amdgpu/pm: add smu i2c implementation for navi1x (v5)

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And handle more than just EEPROMs.

v2: fix restart handling between transactions.
v3: handle 7 to 8 bit addr conversion
v4: Fix &req --> req. (Luben T)
v5: squash in i2c channel fix

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Luben Tuikov <luben.tuikov@amd.com>
Reviewed-by: Luben Tuikov <luben.tuikov@amd.com>

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Alex Deucher 2021-01-21 14:17:34 -05:00

parent f400b6cec8

commit af01340bc4

1 changed files with 116 additions and 0 deletions

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drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c

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