mmc: sdhci-esdhc-imx: add SD clock limitation for imx6ull

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i.MX6ULL has errata ERR010450, point out that due to SOC I/O
timing limitation, for eMMC HS200 and SD/SDIO 3.0 SDR104, the
clock rate can't exceed 150MHz. And for eMMC DDR52 and SD/SDIO
DDR50 mode, the clock rate can't exceed 45MHz.

This patch add this limit for imx6ull.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
[Ulf: Fixed comments and whitespace]
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

...

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BOUGH CHEN 2018-12-28 03:26:10 +00:00 • committed by Ulf Hansson

parent 772bf73ed4

commit af6a50d457

1 changed files with 21 additions and 1 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

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drivers/mmc/host/sdhci-esdhc-imx.c

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