Fix mpll fractional part and spread sprectrum issues

Add meson8 audio clocks Add g12a temperature sensors clocks Add g12a and g12b cpu clocks -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE9OFZrhjz9W1fG7cb5vwPHDfy2oUFAlz/mNEACgkQ5vwPHDfy 2oWcfg//a5PCWSoRg87zmvBM5O9l6IU7Of3l4lUsGI7J6PrQTeb3IIpxKsP65Yhr 5FxcWU7RarVhYqzoulqu47gaHteKmVWQWHvM917oWX+qcZzXOxO4D9FJbOjCBe8U CZsEAiDZhmPoEFaGsTCX3CDeTqb04IgWtfcIe4pQJCxMck3qp9DcZ3oO0OGHFmtV sE+i2G7VC2zXE2z09Nk1bLtvyNCEvhu7qEcyBhRbCKROztdkKFiFP4+q4r02CoHK rEL+qT46T0hj2XjO+k/EWbmuxHWZbsMucO+P7DbPngFT4MhO2sbgWp4uKV/x8dRp dzkvsXqQDYbuQuh62awzdD4V3Stit8Lgq8YEnpyVPOVyoE7QWbfmKNsqVIhblIQa 6Eqbyr5XlC8lD1plupL4EjMLWArxbk2Lpv4tx/1zkN6CtIaPl87PH6lwZh15zo9d EsMj1Eeeyk8VIrjWJeYbD/X5SNYwjqUCNWw8vRiK6f2DASspp9TNlrAQRNbEezZN dumG069udyzJ5vcfW/pgXrwK1oAlafP+6yf1Eo1T+rGqhxMD9izw6vFcepA2h/7I Xyxq1eJMHj+R22zfJTtp4NEXAcqU2cFm2Vd3nw7+GbNrt+44jIGUBYUBR5UIlR/p mrBYuD4HXchFCTEkXgEYajK7vu79y3GT8Ssq4PQxI5RixSuqOM4= =/5FE -----END PGP SIGNATURE----- Merge tag 'clk-meson-5.3-1' of https://github.com/BayLibre/clk-meson into clk-meson Pull Amlogic clk driver updates from Jerome Brunet: - Fix mpll fractional part and spread sprectrum issues - Add meson8 audio clocks - Add g12a temperature sensors clocks - Add g12a and g12b cpu clocks * tag 'clk-meson-5.3-1' of https://github.com/BayLibre/clk-meson: clk: meson: g12a: mark fclk_div3 as critical clk: meson: g12a: Add support for G12B CPUB clocks dt-bindings: clk: meson: add g12b periph clock controller bindings clk: meson-g12a: add temperature sensor clocks dt-bindings: clk: g12a-clkc: add Temperature Sensor clock IDs clk: meson: meson8b: add the cts_i958 clock clk: meson: meson8b: add the cts_mclk_i958 clocks clk: meson: meson8b: add the cts_amclk clocks dt-bindings: clock: meson8b: add the audio clocks clk: meson: g12a: add controller register init clk: meson: eeclk: add init regs clk: meson: g12a: add mpll register init sequences clk: meson: mpll: add init callback and regs clk: meson: axg: spread spectrum is on mpll2 clk: meson: gxbb: no spread spectrum on mpll0 clk: meson: mpll: properly handle spread spectrum clk: meson: meson8b: fix a typo in the VPU parent names array variable clk: meson: fix MPLL 50M binding id typo
2026-10-16 22:39:48 +00:00 · 2019-06-24 17:40:40 -07:00 · 2019-06-24 17:40:40 -07:00 · afa88bdbf1
commit afa88bdbf1
parent a188339ca5 eda91833f0
13 changed files with 1096 additions and 40 deletions
--- a/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt
+++ b/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt
--- a/drivers/clk/meson/axg.c
+++ b/drivers/clk/meson/axg.c
--- a/drivers/clk/meson/clk-mpll.c
+++ b/drivers/clk/meson/clk-mpll.c
--- a/drivers/clk/meson/clk-mpll.h
+++ b/drivers/clk/meson/clk-mpll.h
--- a/drivers/clk/meson/g12a.c
+++ b/drivers/clk/meson/g12a.c
--- a/drivers/clk/meson/g12a.h
+++ b/drivers/clk/meson/g12a.h
--- a/drivers/clk/meson/gxbb.c
+++ b/drivers/clk/meson/gxbb.c
--- a/drivers/clk/meson/meson-eeclk.c
+++ b/drivers/clk/meson/meson-eeclk.c
--- a/drivers/clk/meson/meson-eeclk.h
+++ b/drivers/clk/meson/meson-eeclk.h
--- a/drivers/clk/meson/meson8b.c
+++ b/drivers/clk/meson/meson8b.c
--- a/drivers/clk/meson/meson8b.h
+++ b/drivers/clk/meson/meson8b.h
--- a/include/dt-bindings/clock/g12a-clkc.h
+++ b/include/dt-bindings/clock/g12a-clkc.h
--- a/include/dt-bindings/clock/meson8b-clkc.h
+++ b/include/dt-bindings/clock/meson8b-clkc.h