clk: sunxi-ng: r40: Add max. rate constraint to video PLLs

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Video PLLs on R40 can be set to higher rate that it is actually
supported by HW.

Limit maximum rate to 1008 MHz. This is the maximum allowed rate by BSP
clock driver. Interestengly, user manual specifies maximum frequency to
be 600 MHz. Historically, this data was wrong in some user manuals for
other SoCs, so more faith is put in BSP clock driver.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>

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Jernej Skrabec 2018-08-09 18:52:15 +02:00 • committed by Maxime Ripard

parent 02d7901695

commit b16fb66915

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1 changed files with 26 additions and 26 deletions

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drivers/clk/sunxi-ng/ccu-sun8i-r40.c

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