drm/i915/icl: combo port vswing programming changes per BSPEC

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In August 2018 the BSPEC changed the ICL port programming sequence to
closely resemble earlier gen programming sequence. Restrict combo phy to
HBR max rate unless eDP panel is connected to port.

v2: remove debug code that Imre found
v3: simplify translation table if-else
v4: edp translation table now based on link rate and low_swing
v5: Misc review comments + r-b
BSpec: 21257
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1545084827-5776-1-git-send-email-clinton.a.taylor@intel.com

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Clint Taylor 2018-12-17 14:13:47 -08:00 • committed by Imre Deak

parent 2c5c415c1d

commit b265a2a625

3 changed files with 93 additions and 153 deletions

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4

drivers/gpu/drm/i915/i915_reg.h

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238

drivers/gpu/drm/i915/intel_ddi.c

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4

drivers/gpu/drm/i915/intel_dp.c

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