clk: samsung: exynos5433: Add clocks for CMU_MSCL domain

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This patch adds the mux/divider/gate clocks for CMU_MSCL domain which
generates the clocks for M2M (Memory to Memory) scaler, JPEG IPs.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>

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Chanwoo Choi 2015-02-03 09:13:51 +09:00 • committed by Sylwester Nawrocki

parent 6c5d76d15a

commit b274bbfd8b

3 changed files with 245 additions and 1 deletions

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20

Documentation/devicetree/bindings/clock/exynos5433-clock.txt

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185

drivers/clk/samsung/clk-exynos5433.c

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41

include/dt-bindings/clock/exynos5433.h

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