perf/x86/lbr: Add interface to get LBR information

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The LBR records msrs are model specific. The perf subsystem has already
obtained the base addresses of LBR records based on the cpu model.

Therefore, an interface is added to allow callers outside the perf
subsystem to obtain these LBR information. It's useful for hypervisors
to emulate the LBR feature for guests with less code.

Signed-off-by: Like Xu <like.xu@linux.intel.com>
Signed-off-by: Wei Wang <wei.w.wang@intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20200613080958.132489-4-like.xu@linux.intel.com

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Like Xu 2020-06-13 16:09:48 +08:00 • committed by Peter Zijlstra

parent 027440b5d4

commit b2d6504761

2 changed files with 32 additions and 0 deletions

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20

arch/x86/events/intel/lbr.c

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12

arch/x86/include/asm/perf_event.h

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