KVM: x86/mmu: Tweak PSE hugepage handling to avoid 2M vs 4M conundrum

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Change the PSE hugepage handling in walk_addr_generic() to fire on any
page level greater than PT_PAGE_TABLE_LEVEL, a.k.a. PG_LEVEL_4K.  PSE
paging only has two levels, so "== 2" and "> 1" are functionally the
same, i.e. this is a nop.

A future patch will drop KVM's PT_*_LEVEL enums in favor of the kernel's
PG_LEVEL_* enums, at which point "walker->level == PG_LEVEL_2M" is
semantically incorrect (though still functionally ok).

No functional change intended.

Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Message-Id: <20200428005422.4235-2-sean.j.christopherson@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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This commit is contained in:

Sean Christopherson 2020-04-27 17:54:20 -07:00 • committed by Paolo Bonzini

parent a71936ab46

commit b2f432f872

1 changed files with 1 additions and 1 deletions

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arch/x86/kvm/mmu/paging_tmpl.h

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