drm/xe/hwmon: handle CRI+ power interval encoding

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On CRI and newer platforms, the power-limit interval encoding is changed
from the legacy 1.x * 2^y format to a U5.2 value in milliseconds.
Update the interval calculation accordingly for CRI and future platforms.

v2: Round the fractional bit to 1 for values greater than 0.5 ms in the
    show path, as the minimum supported time is 1 ms.
    No special handling is needed in the store path since sysfs inputs are
    only in milliseconds. (Badal)

Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
Reviewed-by: Badal Nilawar <badal.nilawar@intel.com>
Link: https://patch.msgid.link/20260703153320.1368225-1-karthik.poosa@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

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Karthik Poosa 2026-07-03 21:03:20 +05:30 • committed by Rodrigo Vivi

parent 9daa302a82

commit b30c987554

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drivers/gpu/drm/xe/xe_hwmon.c

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