drm/i915: Fix ILK GPU reset domain bits

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We're using the reset domains bits for g4x on ilk. But on ilk those bits
actually shifted by one bit. Fix it up so that we use the correct bits.

We were actually always writing 0x2 to the reset domain bits, which
is a reserved value. In practice it looks like the hardware ignores that
value since nothing happens if I write that value when there's a 3D
workload running. Writing the _correct_ render domain value actually
makes the GPU stop.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

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This commit is contained in:

Ville Syrjälä 2014-05-19 19:23:24 +03:00 • committed by Daniel Vetter

parent f67deb723d

commit b3a3f03d7b

2 changed files with 13 additions and 7 deletions

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8

drivers/gpu/drm/i915/i915_reg.h

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12

drivers/gpu/drm/i915/intel_uncore.c

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