drm/i915/vdsc: Add support for read/write PPS for 3rd DSC engine

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With BMG each pipe has 3 DSC engines, so add bits to read/write the PPS
registers for the 3rd DSC engine

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241030041036.1238006-6-ankit.k.nautiyal@intel.com

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Ankit Nautiyal 2024-10-30 09:40:34 +05:30

parent 3013e2e409

commit b3f5f0c8e9

2 changed files with 11 additions and 3 deletions

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8

drivers/gpu/drm/i915/display/intel_vdsc.c

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6

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

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