cpufreq: imx6q: correct VDDSOC/PU voltage scaling when cpufreq is changed

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on i.MX6Q, cpu freq change need to follow below flows:

1. each setpoint has different VDDARM, VDDSOC/PU voltage, get the setpoint
   table from dts;
2. when cpu freq is scaling up, need to increase VDDSOC/PU voltage before
   VDDARM, if VDDPU is off, no need to change it;
3. when cpu freq is scaling down, need to decrease VDDARM voltage before
   VDDSOC/PU, if VDDPU is off, no need to change it;

normally dts will pass vddsoc/pu freq/volt info to kernel, if not, will
use fixed value for vddsoc/pu voltage setting.

Signed-off-by: Anson Huang <b20788@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

...

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Anson Huang 2013-12-19 09:16:47 -05:00 • committed by Rafael J. Wysocki

parent ab1b1c4e82

commit b4573d1d65

1 changed files with 77 additions and 29 deletions

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drivers/cpufreq/imx6q-cpufreq.c

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