From b490667e9d06fe691361a6858bd59e80a7ef59aa Mon Sep 17 00:00:00 2001 From: Matthew Brost Date: Fri, 25 Sep 2026 13:15:19 -0700 Subject: [PATCH] drm/xe: Add device flag to enable PT mirroring across tiles Some multi-tile devices may want to mirror page tables across tiles for memory-bandwidth reasons, while others may not. Add a device flag that allows enabling or disabling page-table mirroring across tiles. Setting the flag to true (the existing behavior) on PVC, but both modes have been tested and are working on PVC. Signed-off-by: Matthew Brost Reviewed-by: Maarten Lankhorst Reviewed-by: Francois Dugast Link: https://patch.msgid.link/20260925201526.1355279-18-matthew.brost@intel.com --- drivers/gpu/drm/xe/xe_device_types.h | 2 ++ drivers/gpu/drm/xe/xe_migrate.c | 5 ++-- drivers/gpu/drm/xe/xe_pci.c | 2 ++ drivers/gpu/drm/xe/xe_pci_types.h | 3 ++- drivers/gpu/drm/xe/xe_pt.c | 36 +++++++++++++++++++++++++-- drivers/gpu/drm/xe/xe_vm.c | 37 +++++++++++++++++++++++++--- drivers/gpu/drm/xe/xe_vm.h | 3 +++ 7 files changed, 79 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h index 215a8a37c794..448d1e1cd333 100644 --- a/drivers/gpu/drm/xe/xe_device_types.h +++ b/drivers/gpu/drm/xe/xe_device_types.h @@ -229,6 +229,8 @@ struct xe_device { u8 has_usm:1; /** @info.has_64bit_timestamp: Device supports 64-bit timestamps */ u8 has_64bit_timestamp:1; + /** @info.has_pt_mirror: Device has PT mirroring across tiles */ + u8 has_pt_mirror:1; /** @info.is_dgfx: is discrete device */ u8 is_dgfx:1; /** @info.needs_scratch: needs scratch page for oob prefetch to work */ diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c index f7e1a81434b2..471ae5741836 100644 --- a/drivers/gpu/drm/xe/xe_migrate.c +++ b/drivers/gpu/drm/xe/xe_migrate.c @@ -246,7 +246,8 @@ static void xe_migrate_prepare_vm(struct xe_tile *tile, struct xe_migrate *m, struct xe_device *xe = tile_to_xe(tile); u16 pat_index = xe_cache_pat_idx(xe, XE_CACHE_WB); u8 id = tile->id; - u32 num_entries = NUM_PT_SLOTS, num_level = vm->pt_root[id]->level; + u32 num_entries = NUM_PT_SLOTS, num_level = + xe_vm_pt_root(vm, id)->level; #define VRAM_IDENTITY_MAP_PT_COUNT 4 u32 num_setup = num_level + VRAM_IDENTITY_MAP_PT_COUNT; #undef VRAM_IDENTITY_MAP_PT_COUNT @@ -258,7 +259,7 @@ static void xe_migrate_prepare_vm(struct xe_tile *tile, struct xe_migrate *m, u64 l1_pt_ofs = xe_bo_size(bo) - 5 * XE_PAGE_SIZE; entry = vm->pt_ops->pde_encode_bo(bo, l1_pt_ofs); - xe_pt_write(xe, &vm->pt_root[id]->bo->vmap, 0, entry); + xe_pt_write(xe, &xe_vm_pt_root(vm, id)->bo->vmap, 0, entry); map_ofs = (num_entries - num_setup) * XE_PAGE_SIZE; diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c index d66d5a0339ae..620f8a75086f 100644 --- a/drivers/gpu/drm/xe/xe_pci.c +++ b/drivers/gpu/drm/xe/xe_pci.c @@ -371,6 +371,7 @@ static const __maybe_unused struct xe_device_desc pvc_desc = { .has_display = false, .has_drm_ras = true, .has_gsc_nvm = 1, + .has_pt_mirror = 1, .has_heci_gscfi = 1, .max_gt_per_tile = 1, .max_remote_tiles = 1, @@ -806,6 +807,7 @@ static int xe_info_init_early(struct xe_device *xe, xe->info.has_mert = desc->has_mert; xe->info.has_page_reclaim_hw_assist = desc->has_page_reclaim_hw_assist; xe->info.has_pre_prod_wa = desc->has_pre_prod_wa; + xe->info.has_pt_mirror = desc->has_pt_mirror; xe->info.has_pxp = desc->has_pxp; xe->info.has_soc_remapper_sysctrl = desc->has_soc_remapper_sysctrl; xe->info.has_soc_remapper_telem = desc->has_soc_remapper_telem; diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h index fed509ff601e..71068cdb3558 100644 --- a/drivers/gpu/drm/xe/xe_pci_types.h +++ b/drivers/gpu/drm/xe/xe_pci_types.h @@ -52,8 +52,9 @@ struct xe_device_desc { u8 has_mbx_power_limits:1; u8 has_mbx_thermal_info:1; u8 has_mert:1; - u8 has_pre_prod_wa:1; u8 has_page_reclaim_hw_assist:1; + u8 has_pre_prod_wa:1; + u8 has_pt_mirror:1; u8 has_pxp:1; u8 has_soc_remapper_sysctrl:1; u8 has_soc_remapper_telem:1; diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c index fbefcfc52dca..dcef29b56d63 100644 --- a/drivers/gpu/drm/xe/xe_pt.c +++ b/drivers/gpu/drm/xe/xe_pt.c @@ -804,7 +804,7 @@ xe_pt_stage_bind(struct xe_tile *tile, struct xe_vma *vma, .wupd.entries = entries, .clear_pt = clear_pt, }; - struct xe_pt *pt = vm->pt_root[tile->id]; + struct xe_pt *pt = xe_vm_pt_root(vm, tile->id); int ret; bool is_purged = false; @@ -1005,6 +1005,11 @@ static int xe_pt_zap_ptes_entry(struct xe_ptw *parent, pgoff_t offset, return 0; } +static bool pt_mirroring_disabled_for_tile(struct xe_vm *vm, u8 tile_id) +{ + return !vm->xe->info.has_pt_mirror && tile_id; +} + static const struct xe_pt_walk_ops xe_pt_zap_ptes_ops = { .pt_entry = xe_pt_zap_ptes_entry, }; @@ -1046,6 +1051,9 @@ bool xe_pt_zap_ptes(struct xe_tile *tile, struct xe_vma *vma) if (!(pt_mask & BIT(tile->id))) return false; + if (pt_mirroring_disabled_for_tile(xe_vma_vm(vma), tile->id)) + return true; + (void)xe_pt_walk_shared(&pt->base, pt->level, xe_vma_start(vma), xe_vma_end(vma), &xe_walk.base); @@ -1098,6 +1106,9 @@ bool xe_pt_zap_ptes_range(struct xe_tile *tile, struct xe_vm *vm, if (!(pt_mask & BIT(tile->id))) return false; + if (pt_mirroring_disabled_for_tile(vm, tile->id)) + return true; + (void)xe_pt_walk_shared(&pt->base, pt->level, xe_svm_range_start(range), xe_svm_range_end(range), &xe_walk.base); @@ -1987,7 +1998,7 @@ static unsigned int xe_pt_stage_unbind(struct xe_tile *tile, .wupd.entries = entries, .prl = pt_update_op->prl, }; - struct xe_pt *pt = vm->pt_root[tile->id]; + struct xe_pt *pt = xe_vm_pt_root(vm, tile->id); (void)xe_pt_walk_shared(&pt->base, pt->level, start, end, &xe_walk.base); @@ -2539,9 +2550,21 @@ int xe_pt_update_ops_prepare(struct xe_device *xe, struct xe_vma_ops *vops) int id, err; for_each_tile(tile, xe, id) { + struct xe_vm_pgtable_update_ops *pt_update_ops = + &vops->pt_update_ops[id]; + if (!vops->pt_update_ops[id].num_ops) continue; + if (pt_mirroring_disabled_for_tile(vops->vm, id)) { + struct xe_page_reclaim_list *prl = &pt_update_ops->prl; + + /* Transfer root PT update ops PRL to current */ + *prl = vops->pt_update_ops[0].prl; + xe_page_reclaim_entries_get(prl->entries); + continue; + } + err = __xe_pt_update_ops_prepare(tile, vops); if (err) return err; @@ -2833,6 +2856,12 @@ xe_pt_update_ops_run(struct xe_device *xe, struct xe_vma_ops *vops) struct xe_vm_pgtable_update_ops *pt_update_ops = &vops->pt_update_ops[j]; + if (pt_mirroring_disabled_for_tile(vm, j)) { + xe_tile_assert(tile, !get_current_op(pt_update_ops)); + tile_mask |= BIT(tile->id); + continue; + } + for (i = 0; i < get_current_op(pt_update_ops); ++i) { struct xe_vm_pgtable_update_op *pt_op = to_pt_op(pt_update_ops, i); @@ -2946,6 +2975,9 @@ void xe_pt_update_ops_abort(struct xe_device *xe, struct xe_vma_ops *vops) &vops->pt_update_ops[id]; int i; + if (pt_mirroring_disabled_for_tile(vops->vm, id)) + continue; + for (i = pt_update_ops->num_ops - 1; i >= 0; --i) { struct xe_vm_pgtable_update_op *pt_op = to_pt_op(pt_update_ops, i); diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c index 66ab2396c079..9924ff73a2ca 100644 --- a/drivers/gpu/drm/xe/xe_vm.c +++ b/drivers/gpu/drm/xe/xe_vm.c @@ -846,6 +846,14 @@ free_ops: return err; } +static u8 adjust_rebind_tile_mask(struct xe_vm *vm, u8 tile_mask) +{ + if (vm->xe->info.has_pt_mirror) + return tile_mask; + + return (0x1 << vm->xe->info.tile_count) - 1; +} + struct dma_fence *xe_vma_rebind(struct xe_vm *vm, struct xe_vma *vma, u8 tile_mask) { struct dma_fence *fence = NULL; @@ -862,7 +870,8 @@ struct dma_fence *xe_vma_rebind(struct xe_vm *vm, struct xe_vma *vma, u8 tile_ma vops.flags |= XE_VMA_OPS_FLAG_SKIP_TLB_WAIT | XE_VMA_OPS_FLAG_WAIT_VM_BOOKKEEP; - err = xe_vm_ops_add_rebind(&vops, vma, tile_mask); + err = xe_vm_ops_add_rebind(&vops, vma, + adjust_rebind_tile_mask(vm, tile_mask)); if (err) return ERR_PTR(err); @@ -949,7 +958,8 @@ struct dma_fence *xe_vm_range_rebind(struct xe_vm *vm, vops.flags |= XE_VMA_OPS_FLAG_SKIP_TLB_WAIT | XE_VMA_OPS_FLAG_WAIT_VM_BOOKKEEP; - err = xe_vm_ops_add_range_rebind(&vops, vma, range, tile_mask); + err = xe_vm_ops_add_range_rebind(&vops, vma, range, + adjust_rebind_tile_mask(vm, tile_mask)); if (err) return ERR_PTR(err); @@ -1739,7 +1749,8 @@ struct xe_vm *xe_vm_create(struct xe_device *xe, u32 flags, struct xe_file *xef) for_each_tile(tile, xe, id) { if (flags & XE_VM_FLAG_MIGRATION && - tile->id != XE_VM_FLAG_TILE_ID(flags)) + tile->id != XE_VM_FLAG_TILE_ID(flags) && + (vm->xe->info.has_pt_mirror || id)) continue; vm->pt_root[id] = xe_pt_create(vm, tile, xe->info.vm_max_level, @@ -2049,7 +2060,7 @@ struct xe_vm *xe_vm_lookup(struct xe_file *xef, u32 id) u64 xe_vm_pdp4_descriptor(struct xe_vm *vm, struct xe_tile *tile) { - return vm->pt_ops->pde_encode_bo(vm->pt_root[tile->id]->bo, 0); + return vm->pt_ops->pde_encode_bo(xe_vm_pt_root(vm, tile->id)->bo, 0); } static struct xe_exec_queue * @@ -5074,3 +5085,21 @@ void xe_vm_remove_exec_queue(struct xe_vm *vm, struct xe_exec_queue *q) } up_write(&vm->exec_queues.lock); } + +/** + * xe_vm_pt_root() - Retrieve VM page-table root + * @vm: The VM. + * @tile_id: Tile ID + * + * Retrieve VM page-table root for a tile ID, used to abstract if PT mirroring is + * enabled across tiles. + * + * Return: VM page-table root for a tile ID + */ +struct xe_pt *xe_vm_pt_root(struct xe_vm *vm, u8 tile_id) +{ + if (vm->xe->info.has_pt_mirror) + return vm->pt_root[tile_id]; + + return vm->pt_root[0]; +} diff --git a/drivers/gpu/drm/xe/xe_vm.h b/drivers/gpu/drm/xe/xe_vm.h index c5b900f38ded..89c4f95984a2 100644 --- a/drivers/gpu/drm/xe/xe_vm.h +++ b/drivers/gpu/drm/xe/xe_vm.h @@ -436,4 +436,7 @@ static inline struct drm_exec *xe_vm_validation_exec(struct xe_vm *vm) ((READ_ONCE(tile_present) & ~READ_ONCE(tile_invalidated)) & BIT((tile)->id)) void xe_vma_mem_attr_copy(struct xe_vma_mem_attr *to, struct xe_vma_mem_attr *from); + +struct xe_pt *xe_vm_pt_root(struct xe_vm *vm, u8 tile_id); + #endif