riscv: dts: spacemit: k3: Add Ziccrse extension for X100 cores

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Add the Ziccrse ISA extension to all eight X100 cores. Ziccrse
provides a forward progress guarantee on LR/SC sequences in main
memory regions with cacheability and coherence PMAs.

The SpacemiT X100 core supports it per the SpacemiT K3 hardware
specification.

Signed-off-by: Guodong Xu <guodong@riscstar.com>
Reviewed-by: Yixun lan <dlan@kernel.org>
Link: https://patch.msgid.link/20260526-k3-ziccrse-v1-1-c759792ca3a3@riscstar.com
Signed-off-by: Yixun Lan <dlan@kernel.org>

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Guodong Xu 2026-05-26 15:22:58 -04:00 • committed by Yixun Lan

parent cfe5c91cb7

commit b4a789799d

1 changed files with 8 additions and 8 deletions

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arch/riscv/boot/dts/spacemit/k3.dtsi

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