RDMA/mlx5: Remove mlx5_ib_mr->order

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The is only ever set to non-zero if the MR is from the cache, and if it is
cached then the order is in cached_ent->order.

Make it clearer that use_umr_mtt_update() only returns true for cached MRs
and remove the redundant data.

Link: https://lore.kernel.org/r/20201026131936.1335664-2-leon@kernel.org
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>

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This commit is contained in:

Jason Gunthorpe 2020-10-26 15:19:30 +02:00

parent e28bf1f03b

commit b4d031cdae

2 changed files with 3 additions and 3 deletions

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1

drivers/infiniband/hw/mlx5/mlx5_ib.h

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5

drivers/infiniband/hw/mlx5/mr.c

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