PCI: brcmstb: Set MLW based on "num-lanes" DT property if present

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[ Upstream commit a364d10ffe ]

By default, the driver relies on the default hardware defined value for the
Max Link Width (MLW) capability. But if the "num-lanes" DT property is
present, assume that the chip's default capability information is incorrect
or undesired, and use the specified value instead.

Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
[mani: reworded the description and comments]
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Link: https://patch.msgid.link/20250530224035.41886-3-james.quinlan@broadcom.com
Stable-dep-of: 9583f9d229 ("PCI: brcmstb: Fix disabling L0s capability")
Signed-off-by: Sasha Levin <sashal@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

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Jim Quinlan 2026-01-05 12:34:19 -05:00 • committed by Greg Kroah-Hartman

parent 8d185636a6

commit b4e2b74f69

1 changed files with 26 additions and 1 deletions

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drivers/pci/controller/pcie-brcmstb.c

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