arm64: tegra: Fix SOR powergate clocks and reset

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Tegra210 device tree lists CSI clock and reset under SOR powergate
node.

But Tegra210 has CSICIL in SOR partition and CSI in VENC partition.

So, this patch includes fix for SOR powergate node.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

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Sowjanya Komatineni 2020-05-04 19:31:52 -07:00 • committed by Thierry Reding

parent 4012ab12b3

commit b4f99176a5

1 changed files with 3 additions and 2 deletions

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arch/arm64/boot/dts/nvidia/tegra210.dtsi

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