drm/amd/display: Add Renoir registers (v3)

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add registers for dcn, clk, and renoir ip offsets

v2: header cleanup (Alex)
v3: Add DPCS registers (Hersen)

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Bhawanpreet Lakha 2019-07-25 15:51:41 -04:00 • committed by Alex Deucher

parent eee3258e8f

commit b593bce59b

7 changed files with 75988 additions and 0 deletions

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56

drivers/gpu/drm/amd/include/asic_reg/clk/clk_10_0_2_offset.h

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drivers/gpu/drm/amd/include/asic_reg/clk/clk_10_0_2_sh_mask.h

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drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h

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drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h

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drivers/gpu/drm/amd/include/asic_reg/dcn/dpcs_2_1_0_offset.h

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drivers/gpu/drm/amd/include/asic_reg/dcn/dpcs_2_1_0_sh_mask.h

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drivers/gpu/drm/amd/include/renoir_ip_offset.h

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