PCI/ASPM: Read and set up L1 substate capabilities

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The PCIe spec (r3.1, sec 7.33) says the L1 PM Substates Capability may be
implemented only in function 0.

Read the L1 substate capability structures of upstream and downstream
components of the link and set it up in the device structure.

[bhelgaas: add specific spec reference]
Signed-off-by: Rajat Jain <rajatja@google.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

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Rajat Jain 2017-01-02 22:34:12 -08:00 • committed by Bjorn Helgaas

parent b2103ccbb6

commit b5a0a9b59c

1 changed files with 58 additions and 1 deletions

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drivers/pci/pcie/aspm.c

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