drm/i915/cx0: Add PLL information for MTL+

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Start bringing MTL+ platforms as part of PLL framework.
The work is started by adding PLL information and related
function hooks.

BSpec: 55726

v2: Revise commit message and add BSpec ID (Suraj)

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/20251117104602.2363671-17-mika.kahola@intel.com

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Mika Kahola 2025-11-17 12:45:46 +02:00

parent ac34237211

commit b5c0256a58

1 changed files with 19 additions and 0 deletions

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drivers/gpu/drm/i915/display/intel_dpll_mgr.c

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