cxgb4: enable interrupt based Tx completions for T5

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Enable interrupt based Tx completions to improve latency for T5.
The consumer index (CIDX) will now come via interrupts so that Tx
SKBs can be freed up sooner in Rx path. Also, enforce CIDX flush
threshold override (CIDXFTHRESHO) to improve latency for slow
traffic. This ensures that the interrupt is generated immediately
whenever hardware catches up with driver (i.e. CIDX == PIDX is
reached), which is often the case for slow traffic.

Signed-off-by: Raju Rangoju <rajur@chelsio.com>
Link: https://lore.kernel.org/r/20210115102059.6846-1-rajur@chelsio.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

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Raju Rangoju 2021-01-15 15:50:59 +05:30 • committed by Jakub Kicinski

parent c761b2df9d

commit b660bccbc3

1 changed files with 33 additions and 5 deletions

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38

drivers/net/ethernet/chelsio/cxgb4/sge.c

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