powerpc: Expose TSCR via sysfs

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The thread switch control register (TSCR) is a per core register
that configures how the CPU shares resources between SMT threads.

Exposing it via sysfs allows us to tune it at run time.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

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Anton Blanchard 2017-09-08 03:11:12 +10:00 • committed by Michael Ellerman

parent 8d81296cfc

commit b6d34eb4d2

1 changed files with 8 additions and 0 deletions

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arch/powerpc/kernel/sysfs.c

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