arm64: ZynqMP DT changes for 6.9

dt-bindings: - Describe firmware for Versal NET - Describe all firmware child nodes - Align versal-fpga node name with dt schema - Describe k26 rev2 and kv260 DTs: - Align firmware node with dt schema - Add an optee node - Describe reset for CANs - Update ECAM size to discover up to 256 buses - Describe assigned-clocks for uarts - Add u-boot node - Comment SMMU entries - Align dwc3 nodes with dt schema - Rename i2c groups to match dt schema - Small DT updates (comments) - Fix default clock frequency for si570 (zcu102, zcu106) - Add output-enable pins and cover MIO38 (SOM) -----BEGIN PGP SIGNATURE----- iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCZdyDIwAKCRDKSWXLKUoM IRTlAKCBnBVaSTKA2VR6roEHzjsg2ri+jgCfcnNnm1wc5KdnKsW17kHmKGjTFaI= =0Qlr -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmXhzg8ACgkQYKtH/8kJ UieZLRAA2UvwLSnLB49ByEj1y0jLCqjWBxAdivzi/hAq3XTw7+CljUupWBggYIYG Y3P1Md26+LbUNvlIeEMP/HCznJC3tQiuVmPtpGAJXJoRbFNgpSxqn76Q+FQ03mLc UBAtybk9DXxqxqx5lIYbLQ5CtZMPdUObN+kXksu/Uw27vUVjDWsKOIfwpK+D04aj req2R6dWEp6diP94++oH33PQPn3i5EeAXM8nN3mDpuS+ffLqdnAhvhb3s2xHNi8m B+gpGP59lTRC0AGmoh9TJo+ErEogMDW5PTA3GKlhlZVXNFxkyA2W1tkiVyhvBfu9 3TrC+pmZeofB3n0d68ekJ5gt8TNeecjvM09DgO6K7imPLXkR5aMagyx+WJHU06O6 0naQzCYwsMQuDKnspFWYviszk648fvQqNpcU5A/rHkm2mFUTFGV2ZNLRh9YA6UfO vRDr7iIQ3N3F0kDmiPBbKoMKEu5o+WFWc8YgjnHbLTThalsGACzHYYyFjQdcnkh7 9cnG9qdb/dduFFtrp54Uk2I/DF+tBTaiYWvWCHbNDw23nu5u4mLS3t9ORhXPyg7k KKikhRXhCjab2hFMGtC7zhiUnGpoK4BPckJSYPCXVNM55qkZO0PgKr7W5Ieor0BM XRK4UqbkX8e0knxF0YIGsESno6876hrL1T5E+jO4ldhNUR9nu7U= =dkX9 -----END PGP SIGNATURE----- Merge tag 'zynqmp-dt-for-6.9' of https://github.com/Xilinx/linux-xlnx into soc/dt arm64: ZynqMP DT changes for 6.9 dt-bindings: - Describe firmware for Versal NET - Describe all firmware child nodes - Align versal-fpga node name with dt schema - Describe k26 rev2 and kv260 DTs: - Align firmware node with dt schema - Add an optee node - Describe reset for CANs - Update ECAM size to discover up to 256 buses - Describe assigned-clocks for uarts - Add u-boot node - Comment SMMU entries - Align dwc3 nodes with dt schema - Rename i2c groups to match dt schema - Small DT updates (comments) - Fix default clock frequency for si570 (zcu102, zcu106) - Add output-enable pins and cover MIO38 (SOM) * tag 'zynqmp-dt-for-6.9' of https://github.com/Xilinx/linux-xlnx: (21 commits) dt-bindings: firmware: xilinx: Describe soc-nvmem subnode dt-bindings: soc: xilinx: Add support for KV260 CC dt-bindings: soc: xilinx: Add support for K26 rev2 SOMs arm64: zynqmp: Align usb clock nodes with binding arm64: zynqmp: Comment all smmu entries arm64: zynqmp: Rename i2c?-gpio to i2c?-gpio-grp arm64: zynqmp: Disable Tri-state for MIO38 Pin arm64: zynqmp: Remove incorrect comment from kv260s arm64: zynqmp: Introduce u-boot options node with bootscr-address arm64: zynqmp: Fix comment to be aligned with board name. arm64: zynqmp: Update ECAM size to discover up to 256 buses arm64: zynqmp: Describe assigned-clocks for uarts arm64: zynqmp: Setup default si570 frequency to 156.25MHz arm64: zynqmp: Add resets property for CAN nodes arm64: zynqmp: Add an OP-TEE node to the device tree arm64: zynqmp: Add output-enable pins to SOMs arm64: zynqmp: Rename zynqmp-power node to power-management dt-bindings: firmware: xilinx: Sort node names (clock-controller) dt-bindings: firmware: xilinx: Describe missing child nodes dt-bindings: firmware: xilinx: Fix versal-fpga node name ... Link: https://lore.kernel.org/r/CAHTX3dLEoFMTGg1Q4+OuOwWYd8N73YBTXki8Vvj3cGHUpLJ0=A@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-09-28 19:20:30 +00:00 · 2024-03-01 13:46:06 +01:00 · 2024-03-01 13:46:06 +01:00 · b797b9cde4
commit b797b9cde4
parent b339605081 d8764d347b
17 changed files with 295 additions and 79 deletions
--- a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
+++ b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
--- a/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml
+++ b/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml
--- a/Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml
+++ b/Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml
--- a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
--- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
--- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm019-dc5.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm019-dc5.dts
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revA.dts
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi