mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/
synced 2026-11-06 18:57:23 +00:00
clk: renesas: Updates for v5.5 (take two)
- Switch some clocks on R-Car Gen2/3 to .determine_rate(), - Add support for the new R-Car M3-W+ (r8a77961) SoC, - Minor fixes and cleanups. -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCXbxIQAAKCRCKwlD9ZEnx cPRKAP0YFKD+1w05E8P4S0qYcxsh+7RdYtbRotn8/5RP9P+9QgD/QMkJtw4AIVjR rOEp1FIdq6dQ0YNtoI+xKqCwkAUvog0= =4FXG -----END PGP SIGNATURE----- Merge tag 'clk-renesas-for-v5.5-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas Pull Renesas clk driver updates from Geert Uytterhoeven: - Switch some clocks on R-Car Gen2/3 to .determine_rate() - Add support for the new R-Car M3-W+ (r8a77961) SoC - Add support for the new RZ/G2N (r8a774b1) SoC - Remove R-Car Gen2 legacy DT clock support - Improve arithmetic divisions on R-Car Gen2 and Gen3 - Improve R-Car Gen3 SD clock handling * tag 'clk-renesas-for-v5.5-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers: (23 commits) clk: renesas: r8a7796: Add R8A77961 CPG/MSSR support clk: renesas: Rename CLK_R8A7796 to CLK_R8A77960 dt-bindings: clock: renesas: cpg-mssr: Document r8a77961 support clk: renesas: r8a77965: Remove superfluous semicolon dt-bindings: clock: renesas: rcar-usb2-clock-sel: Fix typo in example dt-bindings: clock: renesas: Remove R-Car Gen2 legacy DT bindings dt-bindings: clock: Add r8a77961 CPG Core Clock Definitions dt-bindings: power: Add r8a77961 SYSC power domain definitions clk: renesas: rcar-gen3: Switch SD clocks to .determine_rate() clk: renesas: rcar-gen3: Switch Z clocks to .determine_rate() clk: renesas: rcar-gen2: Switch Z clock to .determine_rate() clk: renesas: r8a774b1: Add TMU clock clk: renesas: cpg-mssr: Add r8a774b1 support dt-bindings: clock: renesas: cpg-mssr: Document r8a774b1 binding clk: renesas: rcar-gen3: Loop to find best rate in cpg_sd_clock_round_rate() clk: renesas: rcar-gen3: Absorb cpg_sd_clock_calc_div() clk: renesas: rcar-gen3: Avoid double table iteration in SD .set_rate() clk: renesas: rcar-gen3: Improve arithmetic divisions clk: renesas: rcar-gen2: Improve arithmetic divisions clk: renesas: Remove R-Car Gen2 legacy DT clock support ...
This commit is contained in:
commit
b7c1b40abc
18 changed files with 616 additions and 596 deletions
Loading…
Add table
Add a link
Reference in a new issue