drm/i915/hsw: add missing disabled EUs registers reads

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It turns out that HSW has a register that tells us how many EUs are
disabled per half-slice (roughly a similar notion to subslice). We
didn't read those registers so far as most userspace drivers didn't
need those values prior to Gen8, but an internal library would like to
have access to this.

Since we already have the getparam interface, there is no harm in
exposing this.

v2: Rename bits value (Joonas)

v3: s/GEM_BUG_ON/MISSING_CASE/ (Joonas)

v4: s/GEM_BUG_ON/MISSING_CASE/ again... (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180221204902.23084-1-lionel.g.landwerlin@intel.com

...

This commit is contained in:

Lionel Landwerlin 2018-02-21 20:49:02 +00:00

parent 80d893501b

commit b8ec759e6f

2 changed files with 63 additions and 1 deletions

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7

drivers/gpu/drm/i915/i915_reg.h

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57

drivers/gpu/drm/i915/intel_device_info.c

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