From ba3b58d2c952aeea1621b2c7f0d60888715cf34e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Tue, 23 Jun 2026 15:51:06 +0300 Subject: [PATCH] drm/i915/gmbus: Rename GPIO pins MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Replace the alphabetical GPIOA,GPIOB,... with numeric GPIO_0,GPIO_1,... This makes the naming scheme agree with BSpec. No idea why the alphabetical naming was originally chosen as BSpec never used that convention for the GPIO pins. Signed-off-by: Ville Syrjälä Link: https://patch.msgid.link/20260623125111.6632-2-ville.syrjala@linux.intel.com Reviewed-by: Michał Grzelak --- drivers/gpu/drm/i915/display/intel_gmbus.c | 124 ++++++++++----------- 1 file changed, 62 insertions(+), 62 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c index 049157c41fe2..9990e6391b03 100644 --- a/drivers/gpu/drm/i915/display/intel_gmbus.c +++ b/drivers/gpu/drm/i915/display/intel_gmbus.c @@ -54,21 +54,21 @@ struct intel_gmbus { }; enum gmbus_gpio { - GPIOA, - GPIOB, - GPIOC, - GPIOD, - GPIOE, - GPIOF, - GPIOG, - GPIOH, - __GPIOI_UNUSED, - GPIOJ, - GPIOK, - GPIOL, - GPIOM, - GPION, - GPIOO, + GPIO_0, + GPIO_1, + GPIO_2, + GPIO_3, + GPIO_4, + GPIO_5, + GPIO_6, + GPIO_7, + GPIO_8, + GPIO_9, + GPIO_10, + GPIO_11, + GPIO_12, + GPIO_13, + GPIO_14, }; struct gmbus_pin { @@ -78,77 +78,77 @@ struct gmbus_pin { /* Map gmbus pin pairs to names and registers. */ static const struct gmbus_pin gmbus_pins[] = { - [GMBUS_PIN_SSC] = { "ssc", GPIOB }, - [GMBUS_PIN_VGADDC] = { "vga", GPIOA }, - [GMBUS_PIN_PANEL] = { "panel", GPIOC }, - [GMBUS_PIN_DPC] = { "dpc", GPIOD }, - [GMBUS_PIN_DPB] = { "dpb", GPIOE }, - [GMBUS_PIN_DPD] = { "dpd", GPIOF }, + [GMBUS_PIN_SSC] = { "ssc", GPIO_1 }, + [GMBUS_PIN_VGADDC] = { "vga", GPIO_0 }, + [GMBUS_PIN_PANEL] = { "panel", GPIO_2 }, + [GMBUS_PIN_DPC] = { "dpc", GPIO_3 }, + [GMBUS_PIN_DPB] = { "dpb", GPIO_4 }, + [GMBUS_PIN_DPD] = { "dpd", GPIO_5 }, }; static const struct gmbus_pin gmbus_pins_bdw[] = { - [GMBUS_PIN_VGADDC] = { "vga", GPIOA }, - [GMBUS_PIN_DPC] = { "dpc", GPIOD }, - [GMBUS_PIN_DPB] = { "dpb", GPIOE }, - [GMBUS_PIN_DPD] = { "dpd", GPIOF }, + [GMBUS_PIN_VGADDC] = { "vga", GPIO_0 }, + [GMBUS_PIN_DPC] = { "dpc", GPIO_3 }, + [GMBUS_PIN_DPB] = { "dpb", GPIO_4 }, + [GMBUS_PIN_DPD] = { "dpd", GPIO_5 }, }; static const struct gmbus_pin gmbus_pins_skl[] = { - [GMBUS_PIN_DPC] = { "dpc", GPIOD }, - [GMBUS_PIN_DPB] = { "dpb", GPIOE }, - [GMBUS_PIN_DPD] = { "dpd", GPIOF }, + [GMBUS_PIN_DPC] = { "dpc", GPIO_3 }, + [GMBUS_PIN_DPB] = { "dpb", GPIO_4 }, + [GMBUS_PIN_DPD] = { "dpd", GPIO_5 }, }; static const struct gmbus_pin gmbus_pins_bxt[] = { - [GMBUS_PIN_1_BXT] = { "dpb", GPIOB }, - [GMBUS_PIN_2_BXT] = { "dpc", GPIOC }, - [GMBUS_PIN_3_BXT] = { "misc", GPIOD }, + [GMBUS_PIN_1_BXT] = { "dpb", GPIO_1 }, + [GMBUS_PIN_2_BXT] = { "dpc", GPIO_2 }, + [GMBUS_PIN_3_BXT] = { "misc", GPIO_3 }, }; static const struct gmbus_pin gmbus_pins_cnp[] = { - [GMBUS_PIN_1_BXT] = { "dpb", GPIOB }, - [GMBUS_PIN_2_BXT] = { "dpc", GPIOC }, - [GMBUS_PIN_3_BXT] = { "misc", GPIOD }, - [GMBUS_PIN_4_CNP] = { "dpd", GPIOE }, + [GMBUS_PIN_1_BXT] = { "dpb", GPIO_1 }, + [GMBUS_PIN_2_BXT] = { "dpc", GPIO_2 }, + [GMBUS_PIN_3_BXT] = { "misc", GPIO_3 }, + [GMBUS_PIN_4_CNP] = { "dpd", GPIO_4 }, }; static const struct gmbus_pin gmbus_pins_icp[] = { - [GMBUS_PIN_1_BXT] = { "dpa", GPIOB }, - [GMBUS_PIN_2_BXT] = { "dpb", GPIOC }, - [GMBUS_PIN_3_BXT] = { "dpc", GPIOD }, - [GMBUS_PIN_9_TC1_ICP] = { "tc1", GPIOJ }, - [GMBUS_PIN_10_TC2_ICP] = { "tc2", GPIOK }, - [GMBUS_PIN_11_TC3_ICP] = { "tc3", GPIOL }, - [GMBUS_PIN_12_TC4_ICP] = { "tc4", GPIOM }, - [GMBUS_PIN_13_TC5_TGP] = { "tc5", GPION }, - [GMBUS_PIN_14_TC6_TGP] = { "tc6", GPIOO }, + [GMBUS_PIN_1_BXT] = { "dpa", GPIO_1 }, + [GMBUS_PIN_2_BXT] = { "dpb", GPIO_2 }, + [GMBUS_PIN_3_BXT] = { "dpc", GPIO_3 }, + [GMBUS_PIN_9_TC1_ICP] = { "tc1", GPIO_9 }, + [GMBUS_PIN_10_TC2_ICP] = { "tc2", GPIO_10 }, + [GMBUS_PIN_11_TC3_ICP] = { "tc3", GPIO_11 }, + [GMBUS_PIN_12_TC4_ICP] = { "tc4", GPIO_12 }, + [GMBUS_PIN_13_TC5_TGP] = { "tc5", GPIO_13 }, + [GMBUS_PIN_14_TC6_TGP] = { "tc6", GPIO_14 }, }; static const struct gmbus_pin gmbus_pins_dg1[] = { - [GMBUS_PIN_1_BXT] = { "dpa", GPIOB }, - [GMBUS_PIN_2_BXT] = { "dpb", GPIOC }, - [GMBUS_PIN_3_BXT] = { "dpc", GPIOD }, - [GMBUS_PIN_4_CNP] = { "dpd", GPIOE }, + [GMBUS_PIN_1_BXT] = { "dpa", GPIO_1 }, + [GMBUS_PIN_2_BXT] = { "dpb", GPIO_2 }, + [GMBUS_PIN_3_BXT] = { "dpc", GPIO_3 }, + [GMBUS_PIN_4_CNP] = { "dpd", GPIO_4 }, }; static const struct gmbus_pin gmbus_pins_dg2[] = { - [GMBUS_PIN_1_BXT] = { "dpa", GPIOB }, - [GMBUS_PIN_2_BXT] = { "dpb", GPIOC }, - [GMBUS_PIN_3_BXT] = { "dpc", GPIOD }, - [GMBUS_PIN_4_CNP] = { "dpd", GPIOE }, - [GMBUS_PIN_9_TC1_ICP] = { "tc1", GPIOJ }, + [GMBUS_PIN_1_BXT] = { "dpa", GPIO_1 }, + [GMBUS_PIN_2_BXT] = { "dpb", GPIO_2 }, + [GMBUS_PIN_3_BXT] = { "dpc", GPIO_3 }, + [GMBUS_PIN_4_CNP] = { "dpd", GPIO_4 }, + [GMBUS_PIN_9_TC1_ICP] = { "tc1", GPIO_9 }, }; static const struct gmbus_pin gmbus_pins_mtp[] = { - [GMBUS_PIN_1_BXT] = { "dpa", GPIOB }, - [GMBUS_PIN_2_BXT] = { "dpb", GPIOC }, - [GMBUS_PIN_3_BXT] = { "dpc", GPIOD }, - [GMBUS_PIN_4_CNP] = { "dpd", GPIOE }, - [GMBUS_PIN_5_MTP] = { "dpe", GPIOF }, - [GMBUS_PIN_9_TC1_ICP] = { "tc1", GPIOJ }, - [GMBUS_PIN_10_TC2_ICP] = { "tc2", GPIOK }, - [GMBUS_PIN_11_TC3_ICP] = { "tc3", GPIOL }, - [GMBUS_PIN_12_TC4_ICP] = { "tc4", GPIOM }, + [GMBUS_PIN_1_BXT] = { "dpa", GPIO_1 }, + [GMBUS_PIN_2_BXT] = { "dpb", GPIO_2 }, + [GMBUS_PIN_3_BXT] = { "dpc", GPIO_3 }, + [GMBUS_PIN_4_CNP] = { "dpd", GPIO_4 }, + [GMBUS_PIN_5_MTP] = { "dpe", GPIO_5 }, + [GMBUS_PIN_9_TC1_ICP] = { "tc1", GPIO_9 }, + [GMBUS_PIN_10_TC2_ICP] = { "tc2", GPIO_10 }, + [GMBUS_PIN_11_TC3_ICP] = { "tc3", GPIO_11 }, + [GMBUS_PIN_12_TC4_ICP] = { "tc4", GPIO_12 }, }; static const struct gmbus_pin *get_gmbus_pin(struct intel_display *display,