RISC-V Devicetrees for v6.6

StarFive: There's only StarFive stuff this time around, starting with some bindings to get clock ID defines out of the binding headers. Getting these (and the syscon bindings) in unblocked a swathe of stuff sitting on the list. Added are: new clock controllers and sycons, ethernet support, thermal sensors, USB and PCIe PHYs, hwrng, mmc and a few more besides for the VisionFive v2. The original VisionFive and BeagleV Starlight got some the thermal sensor support too, as that is supported by the same driver. These changes make the board actually usable with something other than an initramfs. Overlay support by way of the -@ flag set during dtb building, is added also. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZNiusAAKCRB4tDGHoIJi 0u5JAP90hKhmPTWqxdRpnFrWi83k9RX4J6k5LHrqyt3e0sZ0HAD+JNiv4i4j8fDv fm7usmraq8B2zLaV/AFmj9kiqdx0JgU= =AH1c -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmTal/YACgkQYKtH/8kJ Uiet0g/9HNACOcnwZi0Py4CJupn+amV5FhsJcqu5ENls0dV73PPVa76+EvNiszsr FqxfAd/n8RMUCAsc6XOHXDUkvVsfWlZSGlslxSC+yPoCGV/4vr7pBbfmQZ42oNX1 YC6Wg1kXhuaKZv68nYLGpFelPBSeKkYLAgcSD8HGx6Ac5tYgblHGDmHW+HZ5ITT3 MA9Am6DaDTN3NpiTGBc/Py2KUGLewqJU6jJutENDDmtO2ocAUR+6OGgq4Kn1w6yQ 5Py5QfJDzds2Eq/GmrL3gxL29OXZYjTqfig/dv9yACTjAPnI0P1JzwdSW++g36i/ CXQ/YQDQ35HK7kUtF2FuQ3Fi5sSdiyoQLtiwfY2HSjI78g3XKJjx2BTo1sGSC8E8 7GVSDxl5ugEo+KhDJnAavTEfJ9p1E6Ik49F4Nj4nnF9HererZwuwMOtxuzy306B1 0iSmcCquUiPkTvQ8SBZW2IC7xpRn3zgjYO8zzLJkPQ+r018mxtpud1OO9bgwGyvf 8GvLGVle4r8mdO74+a0x32sGcbkvSFsD0uf/XZ/nW1ixc/rWuK/WWh6CYnSyR6nI cByzkPWbex9Jx/kIOKKC7wmuMh7rGrp7gLoq/LVCxEQamKmGGjnlTNiiambF9Jfg ie7vLFuNGNDrT1Qh/EWbOtKnNs48WY3Okiid9o9IMdD1ukoA76o= =+tgF -----END PGP SIGNATURE----- Merge tag 'riscv-dt-for-v6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt RISC-V Devicetrees for v6.6 StarFive: There's only StarFive stuff this time around, starting with some bindings to get clock ID defines out of the binding headers. Getting these (and the syscon bindings) in unblocked a swathe of stuff sitting on the list. Added are: new clock controllers and sycons, ethernet support, thermal sensors, USB and PCIe PHYs, hwrng, mmc and a few more besides for the VisionFive v2. The original VisionFive and BeagleV Starlight got some the thermal sensor support too, as that is supported by the same driver. These changes make the board actually usable with something other than an initramfs. Overlay support by way of the -@ flag set during dtb building, is added also. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-dt-for-v6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: (26 commits) riscv: dts: starfive: jh7110: Fix GMAC configuration riscv: dts: starfive - Add hwrng node for JH7110 SoC riscv: dts: starfive - Add crypto and DMA node for JH7110 riscv: dts: starfive: Add mmc nodes on VisionFive 2 board riscv: dts: starfive: enable DCDC1&ALDO4 node in axp15060 riscv: dts: starfive: Add QSPI controller node for StarFive JH7110 SoC riscv: dts: starfive: jh7110: add the node and pins configuration for tdm riscv: dts: starfive: jh7110: add dma controller node riscv: dts: starfive: Add spi node and pins configuration riscv: dts: starfive: Add USB dts node for JH7110 riscv: dts: starfive: Add USB and PCIe PHY nodes for JH7110 riscv: dts: starfive: jh7110: Add temperature sensor node and thermal-zones riscv: dts: starfive: jh7100: Add temperature sensor node and thermal-zones riscv: dts: starfive: visionfive 2: Add configuration of gmac and phy riscv: dts: starfive: jh7110: Add ethernet device nodes riscv: dts: starfive: jh7110: Add PLL clocks source in SYSCRG node riscv: dts: starfive: jh7110: Add syscon nodes riscv: dts: starfive: jh7110: Add STGCRG/ISPCRG/VOUTCRG nodes riscv: dts: starfive: jh7110: Add DVP and HDMI TX pixel external clocks dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator ... Link: https://lore.kernel.org/r/20230813-naturist-fragment-ac7d10c453ba@spud Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-10-14 05:55:17 +00:00 · 2023-08-14 23:08:54 +02:00 · 2023-08-14 23:08:54 +02:00 · ba81791185
commit ba81791185
parent eeb751c410 f331eb1f54
15 changed files with 1433 additions and 4 deletions
--- a/Documentation/devicetree/bindings/clock/starfive,jh7110-ispcrg.yaml
+++ b/Documentation/devicetree/bindings/clock/starfive,jh7110-ispcrg.yaml
--- a/Documentation/devicetree/bindings/clock/starfive,jh7110-pll.yaml
+++ b/Documentation/devicetree/bindings/clock/starfive,jh7110-pll.yaml
--- a/Documentation/devicetree/bindings/clock/starfive,jh7110-stgcrg.yaml
+++ b/Documentation/devicetree/bindings/clock/starfive,jh7110-stgcrg.yaml
--- a/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml
+++ b/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml
--- a/Documentation/devicetree/bindings/clock/starfive,jh7110-voutcrg.yaml
+++ b/Documentation/devicetree/bindings/clock/starfive,jh7110-voutcrg.yaml
--- a/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
+++ b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
--- a/7
+++ b/7
--- a/arch/riscv/boot/dts/starfive/Makefile
+++ b/arch/riscv/boot/dts/starfive/Makefile
--- a/arch/riscv/boot/dts/starfive/jh7100.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
--- a/include/dt-bindings/clock/starfive,jh7110-crg.h
+++ b/include/dt-bindings/clock/starfive,jh7110-crg.h
--- a/include/dt-bindings/reset/starfive,jh7110-crg.h
+++ b/include/dt-bindings/reset/starfive,jh7110-crg.h