From e3b742026b92a141b43560858b089921953a63de Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Tue, 5 Jun 2018 10:17:49 +0530 Subject: [PATCH 01/21] ARM: dts: sunxi: Add missing cooling device properties for CPUs The cooling device properties, like "#cooling-cells" and "dynamic-power-coefficient", should either be present for all the CPUs of a cluster or none. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can register a cooling device. Add such missing properties. Fix other missing properties (clocks, OPP, clock latency) as well to make it all work. Signed-off-by: Viresh Kumar Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun6i-a31.dtsi | 30 ++++++++++++++++++++++++++++++ arch/arm/boot/dts/sun7i-a20.dtsi | 13 +++++++++++++ arch/arm/boot/dts/sun8i-a33.dtsi | 9 +++++++++ 3 files changed, 52 insertions(+) diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index c72992556a86..debc0bf22ea3 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -119,18 +119,48 @@ cpu@1 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <1>; + clocks = <&ccu CLK_CPU>; + clock-latency = <244144>; /* 8 32k periods */ + operating-points = < + /* kHz uV */ + 1008000 1200000 + 864000 1200000 + 720000 1100000 + 480000 1000000 + >; + #cooling-cells = <2>; }; cpu@2 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <2>; + clocks = <&ccu CLK_CPU>; + clock-latency = <244144>; /* 8 32k periods */ + operating-points = < + /* kHz uV */ + 1008000 1200000 + 864000 1200000 + 720000 1100000 + 480000 1000000 + >; + #cooling-cells = <2>; }; cpu@3 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <3>; + clocks = <&ccu CLK_CPU>; + clock-latency = <244144>; /* 8 32k periods */ + operating-points = < + /* kHz uV */ + 1008000 1200000 + 864000 1200000 + 720000 1100000 + 480000 1000000 + >; + #cooling-cells = <2>; }; }; diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index e529e4ff2174..35372a0cfc8d 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -122,6 +122,19 @@ cpu@1 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <1>; + clocks = <&ccu CLK_CPU>; + clock-latency = <244144>; /* 8 32k periods */ + operating-points = < + /* kHz uV */ + 960000 1400000 + 912000 1400000 + 864000 1300000 + 720000 1200000 + 528000 1100000 + 312000 1000000 + 144000 1000000 + >; + #cooling-cells = <2>; }; }; diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi index 8d278ee001e9..4e92741b24a7 100644 --- a/arch/arm/boot/dts/sun8i-a33.dtsi +++ b/arch/arm/boot/dts/sun8i-a33.dtsi @@ -132,21 +132,30 @@ cpu@0 { }; cpu@1 { + clocks = <&ccu CLK_CPUX>; + clock-names = "cpu"; operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; }; cpu@2 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <2>; + clocks = <&ccu CLK_CPUX>; + clock-names = "cpu"; operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; }; cpu@3 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <3>; + clocks = <&ccu CLK_CPUX>; + clock-names = "cpu"; operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; }; }; From 05a43a262d0360e2ff684862d989ac0fd3cc9e69 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Mon, 25 Jun 2018 14:03:03 +0200 Subject: [PATCH 02/21] ARM: dts: sun8i: r40: Add HDMI pipeline Add all entries needed for HDMI to function properly. Since R40 has highly configurable pipeline, both mixers and both TCON TVs are added. Board specific DT should then connect them together trough TCON TOP muxers to best fit the purpose of the board. Signed-off-by: Jernej Skrabec Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-r40.dtsi | 268 +++++++++++++++++++++++++++++++ 1 file changed, 268 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi index bd97ca3dc2fa..c95a59aac48f 100644 --- a/arch/arm/boot/dts/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/sun8i-r40.dtsi @@ -42,8 +42,10 @@ */ #include +#include #include #include +#include / { #address-cells = <1>; @@ -99,12 +101,76 @@ cpu@3 { }; }; + de: display-engine { + compatible = "allwinner,sun8i-r40-display-engine", + "allwinner,sun8i-h3-display-engine"; + allwinner,pipelines = <&mixer0>, <&mixer1>; + status = "disabled"; + }; + soc { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; + display_clocks: clock@1000000 { + compatible = "allwinner,sun8i-r40-de2-clk", + "allwinner,sun8i-h3-de2-clk"; + reg = <0x01000000 0x100000>; + clocks = <&ccu CLK_DE>, + <&ccu CLK_BUS_DE>; + clock-names = "mod", + "bus"; + resets = <&ccu RST_BUS_DE>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + mixer0: mixer@1100000 { + compatible = "allwinner,sun8i-r40-de2-mixer-0"; + reg = <0x01100000 0x100000>; + clocks = <&display_clocks CLK_BUS_MIXER0>, + <&display_clocks CLK_MIXER0>; + clock-names = "bus", + "mod"; + resets = <&display_clocks RST_MIXER0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + mixer0_out: port@1 { + reg = <1>; + mixer0_out_tcon_top: endpoint { + remote-endpoint = <&tcon_top_mixer0_in_mixer0>; + }; + }; + }; + }; + + mixer1: mixer@1200000 { + compatible = "allwinner,sun8i-r40-de2-mixer-1"; + reg = <0x01200000 0x100000>; + clocks = <&display_clocks CLK_BUS_MIXER1>, + <&display_clocks CLK_MIXER1>; + clock-names = "bus", + "mod"; + resets = <&display_clocks RST_WB>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + mixer1_out: port@1 { + reg = <1>; + mixer1_out_tcon_top: endpoint { + remote-endpoint = <&tcon_top_mixer1_in_mixer1>; + }; + }; + }; + }; + nmi_intc: interrupt-controller@1c00030 { compatible = "allwinner,sun7i-a20-sc-nmi"; interrupt-controller; @@ -485,6 +551,163 @@ gmac_mdio: mdio { }; }; + tcon_top: tcon-top@1c70000 { + compatible = "allwinner,sun8i-r40-tcon-top"; + reg = <0x01c70000 0x1000>; + clocks = <&ccu CLK_BUS_TCON_TOP>, + <&ccu CLK_TCON_TV0>, + <&ccu CLK_TVE0>, + <&ccu CLK_TCON_TV1>, + <&ccu CLK_TVE1>, + <&ccu CLK_DSI_DPHY>; + clock-names = "bus", + "tcon-tv0", + "tve0", + "tcon-tv1", + "tve1", + "dsi"; + clock-output-names = "tcon-top-tv0", + "tcon-top-tv1", + "tcon-top-dsi"; + resets = <&ccu RST_BUS_TCON_TOP>; + #clock-cells = <1>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + tcon_top_mixer0_in: port@0 { + reg = <0>; + + tcon_top_mixer0_in_mixer0: endpoint { + remote-endpoint = <&mixer0_out_tcon_top>; + }; + }; + + tcon_top_mixer0_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + tcon_top_mixer0_out_tcon_lcd0: endpoint@0 { + reg = <0>; + }; + + tcon_top_mixer0_out_tcon_lcd1: endpoint@1 { + reg = <1>; + }; + + tcon_top_mixer0_out_tcon_tv0: endpoint@2 { + reg = <2>; + }; + + tcon_top_mixer0_out_tcon_tv1: endpoint@3 { + reg = <3>; + }; + }; + + tcon_top_mixer1_in: port@2 { + reg = <2>; + + tcon_top_mixer1_in_mixer1: endpoint { + remote-endpoint = <&mixer1_out_tcon_top>; + }; + }; + + tcon_top_mixer1_out: port@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + + tcon_top_mixer1_out_tcon_lcd0: endpoint@0 { + reg = <0>; + }; + + tcon_top_mixer1_out_tcon_lcd1: endpoint@1 { + reg = <1>; + }; + + tcon_top_mixer1_out_tcon_tv0: endpoint@2 { + reg = <2>; + }; + + tcon_top_mixer1_out_tcon_tv1: endpoint@3 { + reg = <3>; + }; + }; + + tcon_top_hdmi_in: port@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + + tcon_top_hdmi_in_tcon_tv0: endpoint@0 { + reg = <0>; + }; + + tcon_top_hdmi_in_tcon_tv1: endpoint@1 { + reg = <1>; + }; + }; + + tcon_top_hdmi_out: port@5 { + reg = <5>; + + tcon_top_hdmi_out_hdmi: endpoint { + remote-endpoint = <&hdmi_in_tcon_top>; + }; + }; + }; + }; + + tcon_tv0: lcd-controller@1c73000 { + compatible = "allwinner,sun8i-r40-tcon-tv", + "allwinner,sun8i-a83t-tcon-tv"; + reg = <0x01c73000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_TCON_TV0>, <&tcon_top 0>; + clock-names = "ahb", "tcon-ch1"; + resets = <&ccu RST_BUS_TCON_TV0>; + reset-names = "lcd"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + tcon_tv0_in: port@0 { + reg = <0>; + }; + + tcon_tv0_out: port@1 { + reg = <1>; + }; + }; + }; + + tcon_tv1: lcd-controller@1c74000 { + compatible = "allwinner,sun8i-r40-tcon-tv", + "allwinner,sun8i-a83t-tcon-tv"; + reg = <0x01c74000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_TCON_TV1>, <&tcon_top 1>; + clock-names = "ahb", "tcon-ch1"; + resets = <&ccu RST_BUS_TCON_TV1>; + reset-names = "lcd"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + tcon_tv1_in: port@0 { + reg = <0>; + }; + + tcon_tv1_out: port@1 { + reg = <1>; + }; + }; + }; + gic: interrupt-controller@1c81000 { compatible = "arm,gic-400"; reg = <0x01c81000 0x1000>, @@ -495,6 +718,51 @@ gic: interrupt-controller@1c81000 { #interrupt-cells = <3>; interrupts = ; }; + + hdmi: hdmi@1ee0000 { + compatible = "allwinner,sun8i-r40-dw-hdmi", + "allwinner,sun8i-a83t-dw-hdmi"; + reg = <0x01ee0000 0x10000>; + reg-io-width = <1>; + interrupts = ; + clocks = <&ccu CLK_BUS_HDMI0>, <&ccu CLK_HDMI_SLOW>, + <&ccu CLK_HDMI>; + clock-names = "iahb", "isfr", "tmds"; + resets = <&ccu RST_BUS_HDMI1>; + reset-names = "ctrl"; + phys = <&hdmi_phy>; + phy-names = "hdmi-phy"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + hdmi_in: port@0 { + reg = <0>; + + hdmi_in_tcon_top: endpoint { + remote-endpoint = <&tcon_top_hdmi_out_hdmi>; + }; + }; + + hdmi_out: port@1 { + reg = <1>; + }; + }; + }; + + hdmi_phy: hdmi-phy@1ef0000 { + compatible = "allwinner,sun8i-r40-hdmi-phy", + "allwinner,sun50i-a64-hdmi-phy"; + reg = <0x01ef0000 0x10000>; + clocks = <&ccu CLK_BUS_HDMI1>, <&ccu CLK_HDMI_SLOW>, + <&ccu 7>, <&ccu 16>; + clock-names = "bus", "mod", "pll-0", "pll-1"; + resets = <&ccu RST_BUS_HDMI0>; + reset-names = "phy"; + #phy-cells = <0>; + }; }; timer { From db49c6825901756e711123d948034661f5b075d9 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Mon, 25 Jun 2018 14:03:04 +0200 Subject: [PATCH 03/21] ARM: dts: sun8i: r40: Enable HDMI output on BananaPi M2 Ultra Since HDMI can be considered as main output, most capable mixer is connected to it (mixer0). Signed-off-by: Jernej Skrabec Signed-off-by: Maxime Ripard --- .../boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 45 +++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts index 25fb048c7df2..4f3d583183dc 100644 --- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts +++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts @@ -59,6 +59,17 @@ chosen { stdout-path = "serial0:115200n8"; }; + connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + leds { compatible = "gpio-leds"; @@ -94,6 +105,10 @@ wifi_pwrseq: wifi_pwrseq { }; }; +&de { + status = "okay"; +}; + &ehci1 { status = "okay"; }; @@ -118,6 +133,16 @@ phy1: ethernet-phy@1 { }; }; +&hdmi { + status = "okay"; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + &i2c0 { status = "okay"; @@ -226,6 +251,26 @@ ®_dldo2 { regulator-name = "vcc-wifi"; }; +&tcon_top_hdmi_in_tcon_tv0 { + remote-endpoint = <&tcon_tv0_out_tcon_top>; +}; + +&tcon_top_mixer0_out_tcon_tv0 { + remote-endpoint = <&tcon_tv0_in_tcon_top>; +}; + +&tcon_tv0_in { + tcon_tv0_in_tcon_top: endpoint { + remote-endpoint = <&tcon_top_mixer0_out_tcon_tv0>; + }; +}; + +&tcon_tv0_out { + tcon_tv0_out_tcon_top: endpoint { + remote-endpoint = <&tcon_top_hdmi_in_tcon_tv0>; + }; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pb_pins>; From 75ab939394fd0b262ad4b5625a55c2895a73c065 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Wed, 27 Jun 2018 10:27:09 +0800 Subject: [PATCH 04/21] ARM: dts: sun8i: a83t: Add CPU regulator supplies for A83T boards The OPPs for the A83T CPU cores were added in v4.17 in commit 2db639d8c166 ("ARM: dts: sun8i: a83t: add stable OPP tables and CPUfreq"), but board level regulator supplies for the CPU clusters were only added for the TBS-A711 tablet. This means the other A83T boards do not benefit from voltage scaling, or worse, if the implementation does not scale the frequency when the voltage is fixed, no benefit at all. Add board level CPU cluster power supplies to all the A83T development boards, so they can have proper dynamic CPU voltage and frequency scaling. Signed-off-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 8 ++++++++ arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 8 ++++++++ arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts | 8 ++++++++ 3 files changed, 24 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts b/arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts index 36ecebaff3c0..1c012a4def16 100644 --- a/arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts +++ b/arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts @@ -79,6 +79,14 @@ reg_usb1_vbus: reg-usb1-vbus { }; }; +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + +&cpu100 { + cpu-supply = <®_dcdc3>; +}; + &ehci0 { status = "okay"; }; diff --git a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts index 3b579d7567c8..c7ce4158d6c8 100644 --- a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts +++ b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts @@ -107,6 +107,14 @@ wifi_pwrseq: wifi_pwrseq { }; }; +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + +&cpu100 { + cpu-supply = <®_dcdc3>; +}; + &de { status = "okay"; }; diff --git a/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts b/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts index 88decb0747ac..e5f0645e53a7 100644 --- a/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts +++ b/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts @@ -145,6 +145,14 @@ wifi_pwrseq: wifi_pwrseq { }; }; +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + +&cpu100 { + cpu-supply = <®_dcdc3>; +}; + &ehci0 { /* GL830 USB-to-SATA bridge here */ status = "okay"; From 20d85508b8a35138df9248e1903ba9cc1e5b1255 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Tue, 10 Jul 2018 22:34:56 +0200 Subject: [PATCH 05/21] ARM: dts: sun8i: r40: Remove fallback display engine compatible R40 has pretty unique display pipeline. Because of that, H3 display engine compatible fallback should be removed. Fixes: 05a43a262d03 ("ARM: dts: sun8i: r40: Add HDMI pipeline") Reviewed-by: Chen-Yu Tsai Signed-off-by: Jernej Skrabec Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-r40.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi index c95a59aac48f..2afb079a3776 100644 --- a/arch/arm/boot/dts/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/sun8i-r40.dtsi @@ -102,8 +102,7 @@ cpu@3 { }; de: display-engine { - compatible = "allwinner,sun8i-r40-display-engine", - "allwinner,sun8i-h3-display-engine"; + compatible = "allwinner,sun8i-r40-display-engine"; allwinner,pipelines = <&mixer0>, <&mixer1>; status = "disabled"; }; From e64cb21c059ba3b08612727d6f116c3fd7ac9a4d Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Tue, 10 Jul 2018 22:35:01 +0200 Subject: [PATCH 06/21] ARM: dts: sun8i: r40: Add mixer ids to TCON TOP sun4i-drm DT binding, second paragraph of the first section says: For all connections between components up to the TCONs in the display pipeline, when there are multiple components of the same type at the same depth, the local endpoint ID must be the same as the remote component's index. Add mixer ids in R40 DT as mandated by DT binding. Fixes: 05a43a262d03 ("ARM: dts: sun8i: r40: Add HDMI pipeline") Reviewed-by: Chen-Yu Tsai Signed-off-by: Jernej Skrabec Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-r40.dtsi | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi index 2afb079a3776..1dd088d82773 100644 --- a/arch/arm/boot/dts/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/sun8i-r40.dtsi @@ -576,9 +576,12 @@ ports { #size-cells = <0>; tcon_top_mixer0_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; reg = <0>; - tcon_top_mixer0_in_mixer0: endpoint { + tcon_top_mixer0_in_mixer0: endpoint@0 { + reg = <0>; remote-endpoint = <&mixer0_out_tcon_top>; }; }; @@ -606,9 +609,12 @@ tcon_top_mixer0_out_tcon_tv1: endpoint@3 { }; tcon_top_mixer1_in: port@2 { + #address-cells = <1>; + #size-cells = <0>; reg = <2>; - tcon_top_mixer1_in_mixer1: endpoint { + tcon_top_mixer1_in_mixer1: endpoint@1 { + reg = <1>; remote-endpoint = <&mixer1_out_tcon_top>; }; }; From f9105d819dff1ad565ed3173851cd4eb996d42b5 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Tue, 10 Jul 2018 22:35:07 +0200 Subject: [PATCH 07/21] ARM: dts: sun8i: r40: Remove fallback compatible for TCON TV A83T and R40 TCON TV are very similar. However, R40 TCON TV is wired differently, which makes it incompatible with A83T TCON TV. Because of that, remove fallback A83T TCON TV compatible. Fixes: 05a43a262d03 ("ARM: dts: sun8i: r40: Add HDMI pipeline") Reviewed-by: Chen-Yu Tsai Signed-off-by: Jernej Skrabec Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-r40.dtsi | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi index 1dd088d82773..6b4fe8eeee99 100644 --- a/arch/arm/boot/dts/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/sun8i-r40.dtsi @@ -666,8 +666,7 @@ tcon_top_hdmi_out_hdmi: endpoint { }; tcon_tv0: lcd-controller@1c73000 { - compatible = "allwinner,sun8i-r40-tcon-tv", - "allwinner,sun8i-a83t-tcon-tv"; + compatible = "allwinner,sun8i-r40-tcon-tv"; reg = <0x01c73000 0x1000>; interrupts = ; clocks = <&ccu CLK_BUS_TCON_TV0>, <&tcon_top 0>; @@ -690,8 +689,7 @@ tcon_tv0_out: port@1 { }; tcon_tv1: lcd-controller@1c74000 { - compatible = "allwinner,sun8i-r40-tcon-tv", - "allwinner,sun8i-a83t-tcon-tv"; + compatible = "allwinner,sun8i-r40-tcon-tv"; reg = <0x01c74000 0x1000>; interrupts = ; clocks = <&ccu CLK_BUS_TCON_TV1>, <&tcon_top 1>; From ccefd95f648a695e3fb62015fd3efc667a250a22 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Tue, 10 Jul 2018 22:35:08 +0200 Subject: [PATCH 08/21] ARM: dts: sun8i: r40: Add missing TCON-TOP - TCON connections Current R40 is missing some graph connections between TCON TOP and TCONs. Add them. Fixes: 05a43a262d03 ("ARM: dts: sun8i: r40: Add HDMI pipeline") Reviewed-by: Chen-Yu Tsai Signed-off-by: Jernej Skrabec Signed-off-by: Maxime Ripard --- .../boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 20 --------- arch/arm/boot/dts/sun8i-r40.dtsi | 44 +++++++++++++++++++ 2 files changed, 44 insertions(+), 20 deletions(-) diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts index 4f3d583183dc..737cf01b1acd 100644 --- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts +++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts @@ -251,26 +251,6 @@ ®_dldo2 { regulator-name = "vcc-wifi"; }; -&tcon_top_hdmi_in_tcon_tv0 { - remote-endpoint = <&tcon_tv0_out_tcon_top>; -}; - -&tcon_top_mixer0_out_tcon_tv0 { - remote-endpoint = <&tcon_tv0_in_tcon_top>; -}; - -&tcon_tv0_in { - tcon_tv0_in_tcon_top: endpoint { - remote-endpoint = <&tcon_top_mixer0_out_tcon_tv0>; - }; -}; - -&tcon_tv0_out { - tcon_tv0_out_tcon_top: endpoint { - remote-endpoint = <&tcon_top_hdmi_in_tcon_tv0>; - }; -}; - &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pb_pins>; diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi index 6b4fe8eeee99..e5c7e4804384 100644 --- a/arch/arm/boot/dts/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/sun8i-r40.dtsi @@ -601,10 +601,12 @@ tcon_top_mixer0_out_tcon_lcd1: endpoint@1 { tcon_top_mixer0_out_tcon_tv0: endpoint@2 { reg = <2>; + remote-endpoint = <&tcon_tv0_in_tcon_top_mixer0>; }; tcon_top_mixer0_out_tcon_tv1: endpoint@3 { reg = <3>; + remote-endpoint = <&tcon_tv1_in_tcon_top_mixer0>; }; }; @@ -634,10 +636,12 @@ tcon_top_mixer1_out_tcon_lcd1: endpoint@1 { tcon_top_mixer1_out_tcon_tv0: endpoint@2 { reg = <2>; + remote-endpoint = <&tcon_tv0_in_tcon_top_mixer1>; }; tcon_top_mixer1_out_tcon_tv1: endpoint@3 { reg = <3>; + remote-endpoint = <&tcon_tv1_in_tcon_top_mixer1>; }; }; @@ -648,10 +652,12 @@ tcon_top_hdmi_in: port@4 { tcon_top_hdmi_in_tcon_tv0: endpoint@0 { reg = <0>; + remote-endpoint = <&tcon_tv0_out_tcon_top>; }; tcon_top_hdmi_in_tcon_tv1: endpoint@1 { reg = <1>; + remote-endpoint = <&tcon_tv1_out_tcon_top>; }; }; @@ -679,11 +685,30 @@ ports { #size-cells = <0>; tcon_tv0_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; reg = <0>; + + tcon_tv0_in_tcon_top_mixer0: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon_top_mixer0_out_tcon_tv0>; + }; + + tcon_tv0_in_tcon_top_mixer1: endpoint@1 { + reg = <1>; + remote-endpoint = <&tcon_top_mixer1_out_tcon_tv0>; + }; }; tcon_tv0_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; reg = <1>; + + tcon_tv0_out_tcon_top: endpoint@1 { + reg = <1>; + remote-endpoint = <&tcon_top_hdmi_in_tcon_tv0>; + }; }; }; }; @@ -702,11 +727,30 @@ ports { #size-cells = <0>; tcon_tv1_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; reg = <0>; + + tcon_tv1_in_tcon_top_mixer0: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon_top_mixer0_out_tcon_tv1>; + }; + + tcon_tv1_in_tcon_top_mixer1: endpoint@1 { + reg = <1>; + remote-endpoint = <&tcon_top_mixer1_out_tcon_tv1>; + }; }; tcon_tv1_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; reg = <1>; + + tcon_tv1_out_tcon_top: endpoint@1 { + reg = <1>; + remote-endpoint = <&tcon_top_hdmi_in_tcon_tv1>; + }; }; }; }; From 6a7556f604f94461ca802ab69a6dad317c014d30 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Tue, 10 Jul 2018 22:35:09 +0200 Subject: [PATCH 09/21] ARM: dts: sun8i: r40: Disable TCONs by default. R40 has 4 TCONs, but only 2 of them can receive some kind of output at the same time. Let's disable them by default, so only those which are really connected on board can be enabled in board dts file. Reviewed-by: Chen-Yu Tsai Signed-off-by: Jernej Skrabec Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 4 ++++ arch/arm/boot/dts/sun8i-r40.dtsi | 2 ++ 2 files changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts index 737cf01b1acd..c39b9169ea64 100644 --- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts +++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts @@ -251,6 +251,10 @@ ®_dldo2 { regulator-name = "vcc-wifi"; }; +&tcon_tv0 { + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pb_pins>; diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi index e5c7e4804384..e2cbd4f645c5 100644 --- a/arch/arm/boot/dts/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/sun8i-r40.dtsi @@ -679,6 +679,7 @@ tcon_tv0: lcd-controller@1c73000 { clock-names = "ahb", "tcon-ch1"; resets = <&ccu RST_BUS_TCON_TV0>; reset-names = "lcd"; + status = "disabled"; ports { #address-cells = <1>; @@ -721,6 +722,7 @@ tcon_tv1: lcd-controller@1c74000 { clock-names = "ahb", "tcon-ch1"; resets = <&ccu RST_BUS_TCON_TV1>; reset-names = "lcd"; + status = "disabled"; ports { #address-cells = <1>; From 37fb1f8d4596813bf6d39ebd8e609bfa8aee75cd Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Tue, 10 Jul 2018 10:01:00 +0200 Subject: [PATCH 10/21] ARM: dts: sun4i: Switch to new system control compatible string This switches the sun4i-a10 dtsi to use the new compatible for the system-control block (previously named SRAM controller) instead of the deprecated one. The node name is also updated to reflect the fact that the controller described is really about system control rather than SRAM control. Signed-off-by: Paul Kocialkowski [Maxime: Amended the commit message] Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index 3a1c6b45c9a1..82f81f06f201 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -190,8 +190,8 @@ soc { #size-cells = <1>; ranges; - sram-controller@1c00000 { - compatible = "allwinner,sun4i-a10-sram-controller"; + system-control@1c00000 { + compatible = "allwinner,sun4i-a10-system-control"; reg = <0x01c00000 0x30>; #address-cells = <1>; #size-cells = <1>; From 6b7677c05367db4d46bb80ef3b738a1c039f0ac3 Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Tue, 10 Jul 2018 10:01:01 +0200 Subject: [PATCH 11/21] ARM: dts: sun5i: Use most-qualified system control compatibles This switches the sun5i dtsi to use the most qualified compatibles for the system-control block (previously named SRAM controller) as well as the SRAM blocks. The node name for system control is also updated to reflect the fact that the controller described is really about system control rather than SRAM control. Signed-off-by: Paul Kocialkowski [Maxime: Removed the A10 compatible for the driver] Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i.dtsi | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi index 07f2248ed5f8..b833f4eb3bd2 100644 --- a/arch/arm/boot/dts/sun5i.dtsi +++ b/arch/arm/boot/dts/sun5i.dtsi @@ -114,8 +114,8 @@ soc@1c00000 { #size-cells = <1>; ranges; - sram-controller@1c00000 { - compatible = "allwinner,sun4i-a10-sram-controller"; + system-control@1c00000 { + compatible = "allwinner,sun5i-a13-system-control"; reg = <0x01c00000 0x30>; #address-cells = <1>; #size-cells = <1>; @@ -130,7 +130,8 @@ sram_a: sram@0 { }; emac_sram: sram-section@8000 { - compatible = "allwinner,sun4i-a10-sram-a3-a4"; + compatible = "allwinner,sun5i-a13-sram-a3-a4", + "allwinner,sun4i-a10-sram-a3-a4"; reg = <0x8000 0x4000>; status = "disabled"; }; @@ -143,7 +144,8 @@ sram_d: sram@10000 { ranges = <0 0x00010000 0x1000>; otg_sram: sram-section@0 { - compatible = "allwinner,sun4i-a10-sram-d"; + compatible = "allwinner,sun5i-a13-sram-d", + "allwinner,sun4i-a10-sram-d"; reg = <0x0000 0x1000>; status = "disabled"; }; From f4ca1a5c7e58ef0c38e6c697f7fefb1e081a579d Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Tue, 10 Jul 2018 10:01:02 +0200 Subject: [PATCH 12/21] ARM: dts: sun7i: Use most-qualified system control compatibles This switches the sun7i-a20 dtsi to use the most qualified compatibles for the system-control block (previously named SRAM controller) as well as the SRAM blocks. The sun4i-a10 compatibles are kept since these hardware blocks are backward-compatible. The node name for system control is also updated to reflect the fact that the controller described is really about system control rather than SRAM control. Signed-off-by: Paul Kocialkowski Reviewed-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun7i-a20.dtsi | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 35372a0cfc8d..33e28ae7bc2e 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -252,8 +252,9 @@ soc@1c00000 { #size-cells = <1>; ranges; - sram-controller@1c00000 { - compatible = "allwinner,sun4i-a10-sram-controller"; + system-control@1c00000 { + compatible = "allwinner,sun7i-a20-system-control", + "allwinner,sun4i-a10-system-control"; reg = <0x01c00000 0x30>; #address-cells = <1>; #size-cells = <1>; @@ -267,7 +268,8 @@ sram_a: sram@0 { ranges = <0 0x00000000 0xc000>; emac_sram: sram-section@8000 { - compatible = "allwinner,sun4i-a10-sram-a3-a4"; + compatible = "allwinner,sun7i-a20-sram-a3-a4", + "allwinner,sun4i-a10-sram-a3-a4"; reg = <0x8000 0x4000>; status = "disabled"; }; @@ -281,7 +283,8 @@ sram_d: sram@10000 { ranges = <0 0x00010000 0x1000>; otg_sram: sram-section@0 { - compatible = "allwinner,sun4i-a10-sram-d"; + compatible = "allwinner,sun7i-a20-sram-d", + "allwinner,sun4i-a10-sram-d"; reg = <0x0000 0x1000>; status = "disabled"; }; From c2e01602dc3290e7ba7a808152624fd09a9ef849 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Tue, 10 Jul 2018 10:01:03 +0200 Subject: [PATCH 13/21] ARM: dts: sun5i: Add support for the C1 SRAM region with the SRAM controller This adds support for the C1 SRAM region (to be used with the SRAM controller driver) for sun5i-based platforms. The region is shared between the Video Engine and the CPU. Reviewed-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard Signed-off-by: Paul Kocialkowski [Maxime: Fixed the SRAM C size to take the C2 and C3 SRAM into account] Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi index b833f4eb3bd2..40e4dc293f14 100644 --- a/arch/arm/boot/dts/sun5i.dtsi +++ b/arch/arm/boot/dts/sun5i.dtsi @@ -150,6 +150,20 @@ otg_sram: sram-section@0 { status = "disabled"; }; }; + + sram_c: sram@1d00000 { + compatible = "mmio-sram"; + reg = <0x01d00000 0xd0000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x01d00000 0xd0000>; + + ve_sram: sram-section@0 { + compatible = "allwinner,sun5i-a13-sram-c1", + "allwinner,sun4i-a10-sram-c1"; + reg = <0x000000 0x80000>; + }; + }; }; dma: dma-controller@1c02000 { From 77c223c118a14285ca5efa0f457b2c6b15dfc147 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Tue, 10 Jul 2018 10:01:04 +0200 Subject: [PATCH 14/21] ARM: dts: sun7i: Add support for the C1 SRAM region with the SRAM controller This adds support for the C1 SRAM region (to be used with the SRAM controller driver) for the A20 platform. The region is shared between the Video Engine and the CPU. Signed-off-by: Maxime Ripard Signed-off-by: Paul Kocialkowski [Maxime: Fixed the SRAM C size] Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun7i-a20.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 33e28ae7bc2e..9c52712af241 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -289,6 +289,20 @@ otg_sram: sram-section@0 { status = "disabled"; }; }; + + sram_c: sram@1d00000 { + compatible = "mmio-sram"; + reg = <0x01d00000 0xd0000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x01d00000 0xd0000>; + + ve_sram: sram-section@0 { + compatible = "allwinner,sun7i-a20-sram-c1", + "allwinner,sun4i-a10-sram-c1"; + reg = <0x000000 0x80000>; + }; + }; }; nmi_intc: interrupt-controller@1c00030 { From ae54cf89d6ca897dc698858935b39e91e7e65535 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Tue, 10 Jul 2018 10:01:05 +0200 Subject: [PATCH 15/21] ARM: dts: sun8i: a23-a33: Add SRAM controller node and C1 SRAM region This adds a SRAM controller node for the A23 and A33, with support for the C1 SRAM region that is shared between the Video Engine and the CPU. Signed-off-by: Maxime Ripard Signed-off-by: Paul Kocialkowski [Maxime: Fixed the prefix and the compatibles] Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a23-a33.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi index 44f3cad3de75..c16ffcc4db7d 100644 --- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi +++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi @@ -124,6 +124,28 @@ soc@1c00000 { #size-cells = <1>; ranges; + system-control@1c00000 { + compatible = "allwinner,sun8i-a23-system-control"; + reg = <0x01c00000 0x30>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + sram_c: sram@1d00000 { + compatible = "mmio-sram"; + reg = <0x01d00000 0x80000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x01d00000 0x80000>; + + ve_sram: sram-section@0 { + compatible = "allwinner,sun8i-a23-sram-c1", + "allwinner,sun4i-a10-sram-c1"; + reg = <0x000000 0x80000>; + }; + }; + }; + dma: dma-controller@1c02000 { compatible = "allwinner,sun8i-a23-dma"; reg = <0x01c02000 0x1000>; From 626e6ee210fba380dd652e332493a9b10925f70b Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Tue, 10 Jul 2018 10:01:06 +0200 Subject: [PATCH 16/21] ARM: dts: sun8i: h3: Add SRAM controller node and C1 SRAM region This adds a SRAM controller node for the H3, with support for the C1 SRAM region that is shared between the Video Engine and the CPU. Signed-off-by: Paul Kocialkowski [Maxime: Fixed the compatible and commit prefix] Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-h3.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index 41d57c76f290..eec826abb957 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -111,6 +111,28 @@ timer { }; soc { + system-control@1c00000 { + compatible = "allwinner,sun8i-h3-system-control"; + reg = <0x01c00000 0x30>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + sram_c: sram@1d00000 { + compatible = "mmio-sram"; + reg = <0x01d00000 0x80000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x01d00000 0x80000>; + + ve_sram: sram-section@0 { + compatible = "allwinner,sun8i-h3-sram-c1", + "allwinner,sun4i-a10-sram-c1"; + reg = <0x000000 0x80000>; + }; + }; + }; + mali: gpu@1c40000 { compatible = "allwinner,sun8i-h3-mali", "arm,mali-400"; reg = <0x01c40000 0x10000>; From 089d0f967eec4e30d8f51e2b8bb01bec0944ca54 Mon Sep 17 00:00:00 2001 From: Corentin Labbe Date: Wed, 18 Jul 2018 11:40:37 +0000 Subject: [PATCH 17/21] dt-bindings: net: dwmac-sun8i: Remove unused address-cells/size-cells address-cells/size-cells is unnecessary for dwmac-sun8i node. It was in early days, but since a mdio node is used, it could be removed. Signed-off-by: Corentin Labbe Signed-off-by: Maxime Ripard --- Documentation/devicetree/bindings/net/dwmac-sun8i.txt | 8 -------- 1 file changed, 8 deletions(-) diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt index cfe724398a12..5bb3a18cc38d 100644 --- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt +++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt @@ -19,8 +19,6 @@ Required properties: - reset-names: must be "stmmaceth" - phy-mode: See ethernet.txt - phy-handle: See ethernet.txt -- #address-cells: shall be 1 -- #size-cells: shall be 0 - syscon: A phandle to the device containing the EMAC or GMAC clock register Optional properties: @@ -86,8 +84,6 @@ emac: ethernet@1c0b000 { reset-names = "stmmaceth"; clocks = <&ccu CLK_BUS_EMAC>; clock-names = "stmmaceth"; - #address-cells = <1>; - #size-cells = <0>; phy-handle = <&int_mii_phy>; phy-mode = "mii"; @@ -137,8 +133,6 @@ emac: ethernet@1c0b000 { reset-names = "stmmaceth"; clocks = <&ccu CLK_BUS_EMAC>; clock-names = "stmmaceth"; - #address-cells = <1>; - #size-cells = <0>; phy-handle = <&ext_rgmii_phy>; phy-mode = "rgmii"; @@ -191,8 +185,6 @@ emac: ethernet@1c0b000 { reset-names = "stmmaceth"; clocks = <&ccu CLK_BUS_EMAC>; clock-names = "stmmaceth"; - #address-cells = <1>; - #size-cells = <0>; phy-handle = <&ext_rgmii_phy>; phy-mode = "rgmii"; From b689ea74a671be3fb32cbe228626bfee6fbdf02e Mon Sep 17 00:00:00 2001 From: Corentin Labbe Date: Wed, 18 Jul 2018 11:40:39 +0000 Subject: [PATCH 18/21] ARM: dts: sun8i: a83t: Remove unused address-cells/size-cells of dwmac-sun8i ddress-cells/size-cells is unnecessary for dwmac-sun8i node. It was in early days, but since a mdio node is used, it could be removed. This patch fix the following DT warning: Warning (avoid_unnecessary_addr_size): /soc/ethernet@1c50000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Corentin Labbe Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a83t.dtsi | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index 2be23d600957..00a02b037320 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -902,8 +902,6 @@ emac: ethernet@1c30000 { reset-names = "stmmaceth"; clocks = <&ccu 27>; clock-names = "stmmaceth"; - #address-cells = <1>; - #size-cells = <0>; status = "disabled"; mdio: mdio { From 24770a3160662be1161bc1255d36a963d84a0b0b Mon Sep 17 00:00:00 2001 From: Corentin Labbe Date: Wed, 18 Jul 2018 11:40:40 +0000 Subject: [PATCH 19/21] ARM: dts: sun8i: r40: Remove unused address-cells/size-cells of dwmac-sun8i address-cells/size-cells is unnecessary for dwmac-sun8i node. It was in early days, but since a mdio node is used, it could be removed. This patch fix the following DT warning: Warning (avoid_unnecessary_addr_size): /soc/ethernet@1c50000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Corentin Labbe Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-r40.dtsi | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi index e2cbd4f645c5..ffd9f00f74a4 100644 --- a/arch/arm/boot/dts/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/sun8i-r40.dtsi @@ -539,8 +539,6 @@ gmac: ethernet@1c50000 { reset-names = "stmmaceth"; clocks = <&ccu CLK_BUS_GMAC>; clock-names = "stmmaceth"; - #address-cells = <1>; - #size-cells = <0>; status = "disabled"; gmac_mdio: mdio { From d1ed755dde8f14921deeb0cb0257ba8905dfc9fa Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Wed, 11 Jul 2018 11:25:08 +0200 Subject: [PATCH 20/21] ARM: dts: sun5i: Fix the SRAM A3-A4 declaration According to the system control bindings, the A3-A4 SRAM node should be a child node of the SRAM it belongs to. However, it was introduced at the same level, therefore breaking the binding. Fix this. Fixes: 85870196258f ("ARM: sun5i: a13: Merge common controllers into the common DTSI") Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi index 40e4dc293f14..8bfb36651177 100644 --- a/arch/arm/boot/dts/sun5i.dtsi +++ b/arch/arm/boot/dts/sun5i.dtsi @@ -127,13 +127,13 @@ sram_a: sram@0 { #address-cells = <1>; #size-cells = <1>; ranges = <0 0x00000000 0xc000>; - }; - emac_sram: sram-section@8000 { - compatible = "allwinner,sun5i-a13-sram-a3-a4", - "allwinner,sun4i-a10-sram-a3-a4"; - reg = <0x8000 0x4000>; - status = "disabled"; + emac_sram: sram-section@8000 { + compatible = "allwinner,sun5i-a13-sram-a3-a4", + "allwinner,sun4i-a10-sram-a3-a4"; + reg = <0x8000 0x4000>; + status = "disabled"; + }; }; sram_d: sram@10000 { From c0476a31fb381e02637549bfe45632a4140dd201 Mon Sep 17 00:00:00 2001 From: Steven Vanden Branden Date: Mon, 23 Jul 2018 18:09:54 +0200 Subject: [PATCH 21/21] ARM: dts: sun4i: Add GPU node Add mali gpu node to sun4i a10 platforms. Tested with offscreen rendering with lima mesa (freedesktop gitlab) Signed-off-by: Steven Vanden Branden Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10.dtsi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index 82f81f06f201..3d62a8950720 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -1001,6 +1001,27 @@ can0: can@1c2bc00 { status = "disabled"; }; + mali: gpu@1c40000 { + compatible = "allwinner,sun4i-a10-mali", "arm,mali-400"; + reg = <0x01c40000 0x10000>; + interrupts = <69>, + <70>, + <71>, + <72>, + <73>; + interrupt-names = "gp", + "gpmmu", + "pp0", + "ppmmu0", + "pmu"; + clocks = <&ccu CLK_AHB_GPU>, <&ccu CLK_GPU>; + clock-names = "bus", "core"; + resets = <&ccu RST_GPU>; + + assigned-clocks = <&ccu CLK_GPU>; + assigned-clock-rates = <384000000>; + }; + fe0: display-frontend@1e00000 { compatible = "allwinner,sun4i-a10-display-frontend"; reg = <0x01e00000 0x20000>;